A computer having writable control memory is known as_ a. Static micro programmable b. Dynamic micro programmable c. Botha & b d. None of these

A computer having writable control memory is known as_

a. Static micro programmable
b. Dynamic micro programmable
c. Botha & b
d. None of these
by

1 Answer

Answer :

b. Dynamic micro programmable
by

Related questions

During program execution content of main memory undergo changes and, but control memory has _ microprogram: a. Static b. Dynamic c. Compile time d. Fixed

Description : During program execution content of main memory undergo changes and, but control memory has _ microprogram: a. Static b. Dynamic c. Compile time d. Fixed

Last Answer : d. Fixed

IBM-360 type language is example which supporting _—___—sJanguage. a. Micro b. Macro c. Botha &b d. None of these

Description : IBM-360 type language is example which supporting _—___—sJanguage. a. Micro b. Macro c. Botha &b d. None of these

Last Answer : b. Macro

Each instruction is executed by set of micro operations termed as. a. Micro instructions b. Mini instructions c. Botha &b d. None of these

Description : Each instruction is executed by set of micro operations termed as. a. Micro instructions b. Mini instructions c. Botha &b d. None of these

Last Answer : a. Micro instructions

Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these

Description : Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these

Last Answer : b. Cache memory

function is used to transfer the control to end of a program which uses one argument( ) and takes value is zero for_ __ termination and non-zero for _termination: a. _ Exit( ) normal, abnormal b. Break, normal, abnormal Botha & b None of these

Description : function is used to transfer the control to end of a program which uses one argument( ) and takes value is zero for_ __ termination and non-zero for _termination: a. _ Exit( ) normal, abnormal b. Break, normal, abnormal Botha & b None of these

Last Answer : a. _ Exit( ) normal, abnormal

Cache memory is located between main memory and : a. CPU b. Memory c. Botha &b d. None of these

Description : Cache memory is located between main memory and : a. CPU b. Memory c. Botha &b d. None of these

Last Answer : a. CPU

getchar :: IO char in this given function what is indicated by IO char: a. when getchar is invoked it returns a character b. when getchar is executed it returns a character c. botha & b d. none of these

Description : getchar :: IO char in this given function what is indicated by IO char: a. when getchar is invoked it returns a character b. when getchar is executed it returns a character c. botha & b d. none of these

Last Answer : a. when getchar is invoked it returns a character

state keeps track of position related to execution of an instruction: a. Major b. Minor c. Botha & b d. None of these

Description : state keeps track of position related to execution of an instruction: a. Major b. Minor c. Botha & b d. None of these

Last Answer : a. Major

The processed data is sent for output to standard __ device which by default is computer screen: a. Input b. Output c. Botha &b d. None of these

Description : The processed data is sent for output to standard __ device which by default is computer screen: a. Input b. Output c. Botha &b d. None of these

Last Answer : b. Output

The micro program is an written in microcode and stored in firmware which is also referred as___ | a. Interpreter and control memory b. Translator and control store c. Translator and control memory d. ‘Interpreter and Translator

Description : The micro program is an written in microcode and stored in firmware which is also referred as___ | a. Interpreter and control memory b. Translator and control store c. Translator and control memory d. ‘Interpreter and Translator

Last Answer : a. Interpreter and control memory

.......................models consider time as one of the important variable. a. Dynamic b. Static c. Botha and b d. None of these

Description : .......................models consider time as one of the important variable. a. Dynamic b. Static c. Botha and b d. None of these

Last Answer : a. Dynamic

In protocol each process can make a request onlyinan a. Increasing order b. Decreasing order c. Botha &b d. None of these

Description : In protocol each process can make a request onlyinan a. Increasing order b. Decreasing order c. Botha &b d. None of these

Last Answer : a. Increasing order

Which state refers to a state that is not safe not necessarily a deadlocked state. a. Safe state b. Unsafe state c. Botha &b d. None of these

Description : Which state refers to a state that is not safe not necessarily a deadlocked state. a. Safe state b. Unsafe state c. Botha &b d. None of these

Last Answer : b. Unsafe state

Which is one of the important I/O devices and is most commonly used as permanent storage device in any processor: a. Soft disk b. Hard disk c. Botha &b d. None of these

Description : Which is one of the important I/O devices and is most commonly used as permanent storage device in any processor: a. Soft disk b. Hard disk c. Botha &b d. None of these

Last Answer : b. Hard disk

which of the 2 files are created by the assembler. a. _ List and object file b. Link and object file c. Botha &b d. None of these

Description : which of the 2 files are created by the assembler. a. _ List and object file b. Link and object file c. Botha &b d. None of these

Last Answer : a. _ List and object file

Ingiven lines of code MOV AX,BL have different type of operands according to assembler for 8086 architecture these identifiers must be of. a. Different type only in byte b. Same type either in word or byte c. Botha &b d. None of these

Description : Ingiven lines of code MOV AX,BL have different type of operands according to assembler for 8086 architecture these identifiers must be of. a. Different type only in byte b. Same type either in word or byte c. Botha &b d. None of these

Last Answer : b. Same type either in word or byte

address is not assigned by linker. a. Absolute b. Relative c. Botha &b a None of these

Description : address is not assigned by linker. a. Absolute b. Relative c. Botha &b a None of these

Last Answer : a. Absolute

shave addresses where instructions are stored along with address of working storage: a. _ Relative entities b. Absolute entities c. Botha &b d. None of these

Description : shave addresses where instructions are stored along with address of working storage: a. _ Relative entities b. Absolute entities c. Botha &b d. None of these

Last Answer : a. _ Relative entities

Modern assemblers for RISC based architectures make optimization of instruction scheduling to make use of CPU __ efficiently: a. Pipeline b. Without pipeline c. Botha &b d. None of these

Description : Modern assemblers for RISC based architectures make optimization of instruction scheduling to make use of CPU __ efficiently: a. Pipeline b. Without pipeline c. Botha &b d. None of these

Last Answer : a. Pipeline

Full form of MIPS assembler is: a. Microprocessor without interlocked pipeline stage b. Microprocessor with interlocked pipeline stage c. Botha &b d. None of these

Description : Full form of MIPS assembler is: a. Microprocessor without interlocked pipeline stage b. Microprocessor with interlocked pipeline stage c. Botha &b d. None of these

Last Answer : a. Microprocessor without interlocked pipeline stage

Ina complex program, the overlaps: a. Branching b. Condition c. Botha &b d. None of these

Description : Ina complex program, the overlaps: a. Branching b. Condition c. Botha &b d. None of these

Last Answer : a. Branching

Avoid crossing flow lines. a. Flowchart b. Algorithm c. Botha &b d. None of these

Description : Avoid crossing flow lines. a. Flowchart b. Algorithm c. Botha &b d. None of these

Last Answer : a. Flowchart

is useful to prepare detailed program documentation: a. Flowchart b. Algorithm c. Botha &b d. None of these

Description : is useful to prepare detailed program documentation: a. Flowchart b. Algorithm c. Botha &b d. None of these

Last Answer : a. Flowchart

Return instruction is written in_ to written to main program: a. Subroutine b. Main program c. Botha &b d. None of these

Description : Return instruction is written in_ to written to main program: a. Subroutine b. Main program c. Botha &b d. None of these

Last Answer : a. Subroutine

subroutine declaration come after procedure announcement: a. Global b. Local c. Botha &b d. None of these

Description : subroutine declaration come after procedure announcement: a. Global b. Local c. Botha &b d. None of these

Last Answer : a. Global

Callis_ subroutine call. a. Conditional b. Unconditi c. Botha &b d. None of these

Description : Callis_ subroutine call. a. Conditional b. Unconditi c. Botha &b d. None of these

Last Answer : b. Unconditi

which of the following is interrupt mode. a. Task mode b. Executive mode c. Botha &b d. None of these

Description : which of the following is interrupt mode. a. Task mode b. Executive mode c. Botha &b d. None of these

Last Answer : b. Executive mode

SDRAM stands for. a. System dynamic random access memory b. Synchronous dynamic random access memory c. Both d. None

Description : SDRAM stands for. a. System dynamic random access memory b. Synchronous dynamic random access memory c. Both d. None

Last Answer : b. Synchronous dynamic random access memory

The function of these microinstructions is to issue the micro orders to_ _ a. CPU b. Memory c. Register d. Accumulator

Description : The function of these microinstructions is to issue the micro orders to_ _ a. CPU b. Memory c. Register d. Accumulator

Last Answer : a. CPU

Micro-orders generate the_ __ address of operand and execute instruction and prepare for fetching next instruction from the main memory: a. Physical b. Effective c. Logical d. all of above

Description : Micro-orders generate the_ __ address of operand and execute instruction and prepare for fetching next instruction from the main memory: a. Physical b. Effective c. Logical d. all of above

Last Answer : b. Effective

Rules of FSM are encoded in. a. ROM b. Random logic c. Programmable logic array d. Allof these

Description : Rules of FSM are encoded in. a. ROM b. Random logic c. Programmable logic array d. Allof these

Last Answer : d. Allof these

Full form of PLA in CU: a. Progrmmable Logic Array b. Programs Load Array c. Programmable Logic Accumulator d. all of these

Description : Full form of PLA in CU: a. Progrmmable Logic Array b. Programs Load Array c. Programmable Logic Accumulator d. all of these

Last Answer : a. Progrmmable Logic Array

For each micro operation the control unit generates set of_ signals. a. Control b. Address c. Data d. None of these

Description : For each micro operation the control unit generates set of_ signals. a. Control b. Address c. Data d. None of these

Last Answer : a. Control

Which unit acts as the brain of the computer which control other peripherals and interfaces: a. Memory unit b. Cache unit c. Timing and control unit d. None of these

Description : Which unit acts as the brain of the computer which control other peripherals and interfaces: a. Memory unit b. Cache unit c. Timing and control unit d. None of these

Last Answer : c. Timing and control unit

Which is a semi conductor memory? A) Dynamic B) Static C) Bubble D) Both a & b

Description : Which is a semi conductor memory? A) Dynamic B) Static C) Bubble D) Both a & b

Last Answer : Answer : D

is a semi conductor memory. 1) Dynamic 2) Static 3) Bubble 4) Both a & b

Description : is a semi conductor memory. 1) Dynamic 2) Static 3) Bubble 4) Both a & b

Last Answer : 4) Both a & b

_________ is a semi conductor memory. 1 Dynamic 2 Static 3 Bubble 4 Both a & b

Description : _________ is a semi conductor memory. 1 Dynamic 2 Static 3 Bubble 4 Both a & b

Last Answer : 4 Both a & b

Which micro operations carry information from one register to another. a. Register transfer b. Arithmetic c. Logical d. — Allof these

Description : Which micro operations carry information from one register to another. a. Register transfer b. Arithmetic c. Logical d. — Allof these

Last Answer : a. Register transfer

Micro operation is shown as: a. RI->R2 b. R1<-R2

Description : Micro operation is shown as: a. RI->R2 b. R1

Last Answer : b. R1

Arithmetic operation are carried by such micro operation on stored numeric data available in a. Register b. Data c. Both d. None

Description : Arithmetic operation are carried by such micro operation on stored numeric data available in a. Register b. Data c. Both d. None

Last Answer : a. Register

Which operation are binary type, and are performed on bits string that is placed in register: a. Logical micro operation b. Arithmetic micro operation c. Both d. None

Description : Which operation are binary type, and are performed on bits string that is placed in register: a. Logical micro operation b. Arithmetic micro operation c. Both d. None

Last Answer : a. Logical micro operation

A micro operation every bit of a register is a: a. Constant b. Variable c. Both d. None

Description : A micro operation every bit of a register is a: a. Constant b. Variable c. Both d. None

Last Answer : b. Variable

Which operation is extremely useful in serial transfer of data: a. Logical micro operation b. Arithmetic micro operation c. Shift micro operation d. None of these

Description : Which operation is extremely useful in serial transfer of data: a. Logical micro operation b. Arithmetic micro operation c. Shift micro operation d. None of these

Last Answer : c. Shift micro operation

Which operation refer bitwise manipulation of contents of register: a. Logical micro operation b. Arithmetic micro operation c. Shift micro operation d. None of these

Description : Which operation refer bitwise manipulation of contents of register: a. Logical micro operation b. Arithmetic micro operation c. Shift micro operation d. None of these

Last Answer : a. Logical micro operation

Which symbol will be used to denote an micro operation. a. (*) b. (v) c. Both d. None

Description : Which symbol will be used to denote an micro operation. a. (*) b. (v) c. Both d. None

Last Answer : b. (v)

Sequence of microinstructions is termed as micro program or a. Hardware b. Software c. Firmware d. None of these

Description : Sequence of microinstructions is termed as micro program or a. Hardware b. Software c. Firmware d. None of these

Last Answer : c. Firmware

Compared to hardware, firmware is _ __to design micro programmed organization: a. Difficult b. Easier c. Both a& b d. None of these

Description : Compared to hardware, firmware is _ __to design micro programmed organization: a. Difficult b. Easier c. Both a& b d. None of these

Last Answer : b. Easier

who coined the term micro program in 1951. a. T.V. Wilkes b. MV. Wilkes c. S.V. Wilkes d. DV. Wilkes

Description : who coined the term micro program in 1951. a. T.V. Wilkes b. MV. Wilkes c. S.V. Wilkes d. DV. Wilkes

Last Answer : b. MV. Wilkes

Source statements consist of 5fields in microinstruction source code are: a. Lable b. Micro-ops c. CD-spec d. BR-spec e. Address f. All of these

Description : Source statements consist of 5fields in microinstruction source code are: a. Lable b. Micro-ops c. CD-spec d. BR-spec e. Address f. All of these

Last Answer : f. All of these

Which unit works as an interface between the processor and all the memories on chip or off- chip: a. Timing unit b. Control unit c. Memory control unit d All of these

Description : Which unit works as an interface between the processor and all the memories on chip or off- chip: a. Timing unit b. Control unit c. Memory control unit d All of these

Last Answer : c. Memory control unit