Description : Which unit acts as the brain of the computer which control other peripherals and interfaces: a. Memory unit b. Cache unit c. Timing and control unit d. None of these
Last Answer : c. Timing and control unit
Description : Which microprocessor has the control unit, memory unit and arithmetic and logic unit: a. Pentium IV processor b Pentium V processor c. Pentium III processor d. None of these
Last Answer : a. Pentium IV processor
Description : Which unit is necessary for the execution of instruction: a. Timing b. Control ce. Both d. None of these
Last Answer : ce. Both
Description : One of use of microprogramming to implement _ ____ of processor in Intel 80x86 and Motorola 680x0 processors whose instruction set are evolved from 360 original. a. Control structure b. Without control c. Control unit d. Only control
Last Answer : c. Control unit
Description : Which instruction are used in multithreaded parallel processor architecture. a. Memory reference instruction b. Memory reference format c. Both d. None of these
Last Answer : a. Memory reference instruction
Description : Which are benefit of input/output interrupt: a. It is an external analogy to exceptions b. The processor initiates and perform all I/O operation c. The data is transferred into the memory through interrupt handler d. = Alllof these
Last Answer : d. = Alllof these
Description : Which is one of the important I/O devices and is most commonly used as permanent storage device in any processor: a. Soft disk b. Hard disk c. Botha &b d. None of these
Last Answer : b. Hard disk
Description : The complete set of op-codes for a particular microprocessor defines the_ set for that processor: a. Code b. Function c. Module d. Instruction
Last Answer : d. Instruction
Description : Which are the not causes of the interrupt: a. In any single device b. In processor poll devices c. Itis an external analogy to exception d. None of these
Last Answer : c. Itis an external analogy to exception
Description : Which are the causes of the interrupt: a. In any single device b. In processor poll devices c. In a device whose ID number is stored on the address bus d. Allof these
Last Answer : d. Allof these
Description : Which are the functioning of I/O interrupt: a. The processor organizes all the I/O operation for smooth functioning b. After completing the I/O operation the device interrupt the processor c. Both d. None of these
Last Answer : b. After completing the I/O operation the device interrupt the processor
Description : Which processor are used in the most personal computer.
Last Answer : a. _ Intel corporation’s Pentium
Description : In register transfer the processor register as. a MAR b PC c IR d RI
Last Answer : d RI
Description : SPARC stands for. a. Scalable programmer architecture b. Scalable processor architecture c Scalable point architecture d. None of these
Last Answer : b. Scalable processor architecture
Description : Which are the types of array processor: a. Attached array processor b. SIMD array processor c. Both d. None
Last Answer : c. Both
Description : Which processor has a single instruction multiple data stream organization that manipulates the common instruction by means of multiple functional units. a. Attached array processor b. SIMD array processor c. Both d. None
Last Answer : b. SIMD array processor
Description : The register that includes the address of the memory unit is termed asthe _ a. MAR b PC Cc. IR d. None of these
Last Answer : a. MAR
Description : A stack in a digital computer isa partofthe_ ALU CPU a. b. c. Memory unit d None of these
Last Answer : c. Memory unit
Description : The micro program is an written in microcode and stored in firmware which is also referred as___ | a. Interpreter and control memory b. Translator and control store c. Translator and control memory d. ‘Interpreter and Translator
Last Answer : a. Interpreter and control memory
Description : program converts machine instructions into control signals. a. Control memory program b. Control store program c Botha&b d. Only memory
Last Answer : c Botha&b
Description : Which microinstruction provide next instruction from control memory: a. Microinstruction execution b. Microinstruction Buffer c. Microinstruction decoder d. Microinstraction Sequencing
Last Answer : d. Microinstraction Sequencing
Description : Acontrol memory is__ stored in some area of memory: a. Control instraction b. Memory instruction c. Register instruction d. None of these
Last Answer : a. Control instraction
Description : A computer having writable control memory is known as_ a. Static micro programmable b. Dynamic micro programmable c. Botha & b d. None of these
Last Answer : b. Dynamic micro programmable
Description : The control memory contains a set of words where each word is: a. Microinstruction b. Program c. Sets d. All of these
Last Answer : a. Microinstruction
Description : During program execution content of main memory undergo changes and, but control memory has _ microprogram: a. Static b. Dynamic c. Compile time d. Fixed
Last Answer : d. Fixed
Description : Control memory is part of __ that has addressable storage registers and used as temporary storage for data. a. ROM b. RAM c. CPU d. Memory
Last Answer : b. RAM
Description : How many modes the address in control memory are divided. a 2 b 3 c. 5 d 7
Last Answer : a 2
Description : Mode of addresses in control memory are: a. Executive mode b. Task mode c. Botha&b d. None of these
Last Answer : c. Botha&b
Description : Addresses in control memory is made by for each register group: a. Address select logic b. Data select logic c. Control select logic d. All of these
Last Answer : a. Address select logic
Description : There are how many register groups in control memory: a 3 b 5 c. 6 d 8
Last Answer : b 5
Description : What type of circuit is used by control memory to interconnect registers. a. Data routing circuit b. Address routing circuit c. Control routing circuit d. None of the these
Last Answer : a. Data routing circuit
Description : Copy of data in cache memory is called. a. Datacache b. Execution cache c. Address cache d. Control cache
Last Answer : a. Datacache
Description : In cache memory hit rate indicates. a. Data from requested address is not available b. Data from requested address is available c. Control from requested address is available d. Address from requested address is not available
Last Answer : b. Data from requested address is available
Description : In register stack a stack can be a finite number of a Control word b. Memory word c Transfer word d. — Allof these
Last Answer : b. Memory word
Description : A part of Windows 2000 operating system that is not portable is (A) Device Management (B) Virtual Memory Management (C) Processor Management (D) User Interface
Last Answer : (B) Virtual Memory Management
Description : The control unit and arithmetic logic unit are know as the __ a. Central program unit b. Central processing unit
Last Answer : b. Central processing unit
Description : Which unit is comparable to the central nervous system in the human body: a. Output unit b. Control unit c. Input unit d. All of these
Last Answer : b. Control unit
Description : For each micro operation the control unit generates set of_ signals. a. Control b. Address c. Data d. None of these
Last Answer : a. Control
Description : Which is the input of control unit: a. Master clock signal b. Instruction register c. Flags d. Control signals from bus e. Allof these
Last Answer : e. Allof these
Description : If flag is set then control unit issues control signals that causes program counter to be incremented by 1. a. Zero b. One c. Three d. Eight
Last Answer : a. Zero
Description : Which control unit is implemented as combinational circuit in the hardware. a. Microprogrammed control unit b. Hardwired control unit c Blockprogrammed control unit d. Macroprogrammed control unit
Last Answer : b. Hardwired control unit
Description : Decoding of an instruction in RISC architecture means decision on working of control unit for: a. Remainder of instructions b. _ Divisor of instructions c. Dividend of instructions d. None of these
Last Answer : a. Remainder
Description : Assembler works to convert assembly language program into machine language : a. Before the computer can execute it b. After the computer can execute it c. In between execution d. All of these
Last Answer : a. Before the computer can execute it
Description : emaphore provides mutual exclusion for accesses to the buffer pool and is initialized to the value: a. Mutex b. Mutual Cc. Memory d. __ Allof these
Last Answer : Mutex
Description : Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these
Last Answer : b. Cache memory
Description : specify where to get the source and destination operands for the operation specified by the a. Operand fields and opcode b. Opcode and operand c. Source and destination d. Cpu and memory
Last Answer : a. Operand fields and opcode
Description : The source/destination of operands can be the_ or one of the general-purpose register: a. Memory b. One c. both d. None of these
Last Answer : a. Memory
Description : _is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these
Last Answer : b. Fetch
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next
Last Answer : c. Instruction register, incremented and next