Description : In length instruction some programs wants a complex instruction set containing more instruction, more addressing modes and greater address rang, as in case of a. RISC b. CISC c. Both d. None
Last Answer : b. CISC
Description : Addresses in control memory is made by for each register group: a. Address select logic b. Data select logic c. Control select logic d. All of these
Last Answer : a. Address select logic
Description : What type of circuit is used by control memory to interconnect registers. a. Data routing circuit b. Address routing circuit c. Control routing circuit d. None of the these
Last Answer : a. Data routing circuit
Description : Copy of data in cache memory is called. a. Datacache b. Execution cache c. Address cache d. Control cache
Last Answer : a. Datacache
Description : In cache memory hit rate indicates. a. Data from requested address is not available b. Data from requested address is available c. Control from requested address is available d. Address from requested address is not available
Last Answer : b. Data from requested address is available
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next
Last Answer : c. Instruction register, incremented and next
Description : Which is addressed by sign extending the 16-bit displacement to 32-bit: a. Memory address b. Effective memory address c. Both a and b d. None of these
Last Answer : b. Effective memory address
Description : The register that includes the address of the memory unit is termed asthe _ a. MAR b PC Cc. IR d. None of these
Last Answer : a. MAR
Description : In memory transfer location address is supplied by that puts this on address bus. a. ALU b. CPU Cc. MAR d. MDR
Last Answer : b. CPU
Description : In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these
Last Answer : ce. MAR
Description : Which operation puts memory address in memory address register and data in DR. a Memory read b. Memory write c Both d. None
Last Answer : b. Memory write
Description : The memory bus is also referred as _ a. Databus b. Address bus c. Memory bus d. — Allof these
Last Answer : a. Databus
Description : ___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory
Last Answer : b. Microprocessor
Description : Micro-orders generate the_ __ address of operand and execute instruction and prepare for fetching next instruction from the main memory: a. Physical b. Effective c. Logical d. all of above
Last Answer : b. Effective
Description : In cache memory miss rate indicates. a. Availability of requested data b. Availability of requested address c. Non-Availability of requested data d. Non-Availability of requested address
Last Answer : c. Non-Availability of requested data
Description : Invalidation writes only to___ and erases previously residing address in memory: a. Folders b. Memory c. Directory d. Files
Last Answer : c. Directory
Description : Various machine level components are: a. Address register > Program counter c Data register d. Accumulator register e. Memory of 2K,16 bits/word RAM f. Multiplexers g. Allof these
Last Answer : g. Allof these
Description : In stack organization address register is known as the: a. Memory stack b. Stack pointer c. Push operation d. Pop operation
Last Answer : b. Stack pointer
Description : Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU
Last Answer : b. Main memory
Description : Memory —mapped ___is used this is just another memory address. a. Input b. Output c. Both d. None
Last Answer : c. Both
Description : In post-indexing the contents of the address field are used to access a memory location containing a___ address: Immediate addressing Direct addressing Register addressing ao | None of these
Last Answer : Direct addressing
Description : is a symbolic representation of discrete elements of information: a. Data b. Code c. Address d. Control
Last Answer : b. Code
Description : For each micro operation the control unit generates set of_ signals. a. Control b. Address c. Data d. None of these
Last Answer : a. Control
Description : Which control refers to the track of the address of instructions. a. Data control b. Register control c. Program control d. None of these
Last Answer : c. Program control
Description : Who change the address in the program counter and cause the flow of control to be altered: a Shift manipulation b. Circular manipulation c. Program control instruction d. __ Allof these
Last Answer : c. Program control instruction
Description : There are how many register groups in control memory: a 3 b 5 c. 6 d 8
Last Answer : b 5
Description : Which unit acts as the brain of the computer which control other peripherals and interfaces: a. Memory unit b. Cache unit c. Timing and control unit d. None of these
Last Answer : c. Timing and control unit
Description : Which unit works as an interface between the processor and all the memories on chip or off- chip: a. Timing unit b. Control unit c. Memory control unit d All of these
Last Answer : c. Memory control unit
Description : Which microprocessor has the control unit, memory unit and arithmetic and logic unit: a. Pentium IV processor b Pentium V processor c. Pentium III processor d. None of these
Last Answer : a. Pentium IV processor
Description : The micro program is an written in microcode and stored in firmware which is also referred as___ | a. Interpreter and control memory b. Translator and control store c. Translator and control memory d. ‘Interpreter and Translator
Last Answer : a. Interpreter and control memory
Description : program converts machine instructions into control signals. a. Control memory program b. Control store program c Botha&b d. Only memory
Last Answer : c Botha&b
Description : Which microinstruction provide next instruction from control memory: a. Microinstruction execution b. Microinstruction Buffer c. Microinstruction decoder d. Microinstraction Sequencing
Last Answer : d. Microinstraction Sequencing
Description : Acontrol memory is__ stored in some area of memory: a. Control instraction b. Memory instruction c. Register instruction d. None of these
Last Answer : a. Control instraction
Description : A computer having writable control memory is known as_ a. Static micro programmable b. Dynamic micro programmable c. Botha & b d. None of these
Last Answer : b. Dynamic micro programmable
Description : The control memory contains a set of words where each word is: a. Microinstruction b. Program c. Sets d. All of these
Last Answer : a. Microinstruction
Description : During program execution content of main memory undergo changes and, but control memory has _ microprogram: a. Static b. Dynamic c. Compile time d. Fixed
Last Answer : d. Fixed
Description : Control memory is part of __ that has addressable storage registers and used as temporary storage for data. a. ROM b. RAM c. CPU d. Memory
Last Answer : b. RAM
Description : Mode of addresses in control memory are: a. Executive mode b. Task mode c. Botha&b d. None of these
Last Answer : c. Botha&b
Description : In register stack a stack can be a finite number of a Control word b. Memory word c Transfer word d. — Allof these
Last Answer : b. Memory word
Description : The simplest method of controlling sequence of instruction execution is to have each instruction explicitly specify: a. The address of next instruction to be run b. Address of previous instruction c. Both a &b d. None of these
Last Answer : a. The address of next instruction to be run
Description : The contents of the program counter isthe __——__—oof the instruction to be run. a. Data b. Address c. Counter d. None of these
Last Answer : b. Address
Description : Which are the causes of the interrupt: a. In any single device b. In processor poll devices c. In a device whose ID number is stored on the address bus d. Allof these
Last Answer : d. Allof these
Description : By whom address of external function in the assembly source file supplied by __ when activated: a. Assembler b. Linker c. Machine d. Code
Last Answer : b. Linker
Description : address is not assigned by linker. a. Absolute b. Relative c. Botha &b a None of these
Last Answer : a. Absolute
Description : address is provided by linker to modules linked together that starting from. | a. Absolute and 0 b. Relative and 0 c. Relative and 1 d. Relative and 3
Last Answer : b. Relative and 0
Description : shave addresses where instructions are stored along with address of working storage: a. _ Relative entities b. Absolute entities c. Botha &b d. None of these
Last Answer : a. _ Relative entities
Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine
Last Answer : d. Executable, Stack and Subroutine
Description : Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer
Last Answer : Cc. Instruction register
Description : Source statements consist of 5fields in microinstruction source code are: a. Lable b. Micro-ops c. CD-spec d. BR-spec e. Address f. All of these
Last Answer : f. All of these