Interrupt which arises from illegal or erroneous use of an instruction or data is (A) Software interrupt (B) Internal interrupt (C) External interrupt (D) All of the above

Interrupt which arises from illegal or erroneous use of an instruction or data is (A) Software interrupt (B) Internal interrupt (C) External interrupt (D) All of the above
by

1 Answer

Answer :

(B) Internal interrupt
by

Related questions

System calls are usually invoked by using: (A) A privileged instruction (B) An indirect jump (C) A software interrupt (D) Polling

Description : System calls are usually invoked by using: (A) A privileged instruction (B) An indirect jump (C) A software interrupt (D) Polling

Last Answer : (C) A software interrupt

A CPU handles interrupt by executing interrupt service subroutine................. (A) by checking interrupt register after execution of each instruction (B) by checking interrupt register at the end of the fetch cycle (C) whenever an interrupt is registered (D) by checking interrupt register at regular time interval

Description : A CPU handles interrupt by executing interrupt service subroutine................. (A) by checking interrupt register after execution of each instruction (B) by checking interrupt register ... cycle (C) whenever an interrupt is registered (D) by checking interrupt register at regular time interval

Last Answer : (A) by checking interrupt register after execution of each instruction

Match the following mechanisms for interrupting the execution of a process and their uses. i) Interrupt a) Call to an operating system function ii) Trap b) Reaction to an asynchronous external event iii) Supervisor Call c) Handling of a error or an exception condition A) i-a, ii-b, iii-c B) i-c, ii-a, iii-b C) i-b, ii-c, iii-a D) i-a, ii-c, iii-b

Description : Match the following mechanisms for interrupting the execution of a process and their uses. i) Interrupt a) Call to an operating system function ii) Trap b) Reaction to an asynchronous external event iii) Supervisor Call c) Handling of a error ... -a, iii-b C) i-b, ii-c, iii-a D) i-a, ii-c, iii-b

Last Answer : C) i-b, ii-c, iii-a

is an external hardware event which causes the CPU to interrupt the current instruction sequence: a. Input interrupt b. Output interrupt c. Both d. None of these

Description : is an external hardware event which causes the CPU to interrupt the current instruction sequence: a. Input interrupt b. Output interrupt c. Both d. None of these

Last Answer : c. Both

Interrupts that are initiated by an instruction are_______ A. internal B. external C. hardware D. software

Description : Interrupts that are initiated by an instruction are_______ A. internal B. external C. hardware D. software

Last Answer : D. software

Interrupts which are initiated by an instruction are a. internal b. external c. hardware d. software r

Description : Interrupts which are initiated by an instruction are a. internal b. external c. hardware d. software

Last Answer : b. external

Interrupts which are initiated by an instruction are a. internal b. external c. hardware d. software

Description : Interrupts which are initiated by an instruction are a. internal b. external c. hardware d. software

Last Answer : d. software

If you are to use [Control-c] as the interrupt key instead of [Del], then you will have to use A. tty ^c B. stty intr \^c C. stty echoe D. stty echo \^a E. None of the above

Description : If you are to use [Control-c] as the interrupt key instead of [Del], then you will have to use A. tty ^c B. stty intr \^c C. stty echoe D. stty echo \^a E. None of the above

Last Answer : B. stty intr \^c

A job has four pages A, B, C, D and the main memory has two page frames only. The job needs to process its pages in following order: ABACABDBACD Assuming that a page interrupt occurs when a new page is brought in the main memory, irrespective of whether the page is swapped out or not. The number of page interrupts in FIFO and LRU page replacement algorithms are (A) 9 and 7 (B) 7 and 6 (C) 9 and 8 (D) 8 and 6

Description : A job has four pages A, B, C, D and the main memory has two page frames only. The job needs to process its pages in following order: ABACABDBACD Assuming that a page interrupt occurs when a new page is brought in the main ... replacement algorithms are (A) 9 and 7 (B) 7 and 6 (C) 9 and 8 (D) 8 and 6

Last Answer : (C) 9 and 8

Which of the following 8085 microprocessor hardware interrupt has the lowest priority? (A) RST 6.5 (B) RST 7.5 (C) TRAP (D) INTR

Description : Which of the following 8085 microprocessor hardware interrupt has the lowest priority? (A) RST 6.5 (B) RST 7.5 (C) TRAP (D) INTR 

Last Answer : Answer: D

The Register that stores all interrupt requests is: (A) Interrupt mask register (B) Interrupt service register (C) Interrupt request register (D) Status register

Description : The Register that stores all interrupt requests is: (A) Interrupt mask register (B) Interrupt service register (C) Interrupt request register (D) Status register

Last Answer : (C) Interrupt request register

Which of the following is an interrupt according to temporal relationship with system clock? (1) Maskable interrupt (2) Periodic interrupt (3) Division by zero (4) Synchronous interrupt

Description : Which of the following is an interrupt according to temporal relationship with system clock? (1) Maskable interrupt (2) Periodic interrupt (3) Division by zero (4) Synchronous interrupt

Last Answer : Answer: 4

Which are benefit of input/output interrupt: a. It is an external analogy to exceptions b. The processor initiates and perform all I/O operation c. The data is transferred into the memory through interrupt handler d. = Alllof these

Description : Which are benefit of input/output interrupt: a. It is an external analogy to exceptions b. The processor initiates and perform all I/O operation c. The data is transferred into the memory through interrupt handler d. = Alllof these

Last Answer : d. = Alllof these

A firewall is installed at the point where the secure internal network and untrusted external network meet which is also known as ……………… A) Chock point B) meeting point C) firewall point D) secure point

Description : A firewall is installed at the point where the secure internal network and untrusted external network meet which is also known as ……………… A) Chock point B) meeting point C) firewall point D) secure point

Last Answer : A) Chock point

The view of total database content is (A) Conceptual view. (B) Internal view. (C) External view. (D) Physical View.

Description : The view of total database content is (A) Conceptual view. (B) Internal view. (C) External view. (D) Physical View.

Last Answer : (A) Conceptual view.

A ______ Instruction at the end of interrupt service program takes the execution back to the

Description : A ______ Instruction at the end of interrupt service program takes the execution back to the interrupted program.   (a) Forward (b) Return (c) Data (d) Line 

Last Answer : A Return Instruction at the end of interrupt service program takes the execution back to the interrupted program.

Pipelining improves performance by: (A) decreasing instruction latency (B) eliminating data hazards (C) exploiting instruction level parallelism (D) decreasing the cache miss rate

Description : Pipelining improves performance by: (A) decreasing instruction latency (B) eliminating data hazards (C) exploiting instruction level parallelism (D) decreasing the cache miss rate

Last Answer : (C) exploiting instruction level parallelism

The special damages i.e. the damages which arises due to some special or unusual circumstances (a) Are not recoverable altogether (b) Are illegal being positive in nature (c) Cannot be claimed as a matter of right (d) Can be claimed as a matter of right

Description : The special damages i.e. the damages which arises due to some special or unusual circumstances (a) Are not recoverable altogether (b) Are illegal being positive in nature (c) Cannot be claimed as a matter of right (d) Can be claimed as a matter of right

Last Answer : (c) Cannot be claimed as a matter of right

Which of the following actions would be an appropriate response by companies to improve the public's perception of their financial reporting? a. Requiring internal auditors to report all significant findings of fraud and illegal activity to the company president. b. Increased adoption of audit committees. c. Keeping external and internal auditing work separated to maintain independence. d. None of the above.

Description : Which of the following actions would be an appropriate response by companies to improve the public's perception of their financial reporting? a. Requiring internal auditors to report all significant ... external and internal auditing work separated to maintain independence. d. None of the above.

Last Answer : Increased adoption of audit committees.

How are erroneous transfers of data prevented?

Description : How are erroneous transfers of data prevented?

Last Answer : By clearing the register.

Which are the not causes of the interrupt: a. In any single device b. In processor poll devices c. Itis an external analogy to exception d. None of these

Description : Which are the not causes of the interrupt: a. In any single device b. In processor poll devices c. Itis an external analogy to exception d. None of these

Last Answer : c. Itis an external analogy to exception

The external device is connected to a pin called the ______ pin on the processor chip. a. Interrupt b. Transfer c. Both d. None of these

Description : The external device is connected to a pin called the ______ pin on the processor chip. a. Interrupt b. Transfer c. Both d. None of these

Last Answer : a. Interrupt

In 8051 an external interrupt 1 vector address is of ________ and causes of interrupt if ____. a) 000BH, a high to low transition on pin INT1 b) 001BH, a low to high transition on pin INT1 c) 0013H, a high to low transition on pin INT1 d) 0023H, a low to high transition on pin INT1

Description : In 8051 an external interrupt 1 vector address is of ________ and causes of interrupt if ____. a) 000BH, a high to low transition on pin INT1 b) 001BH, a low to high transition on pin INT1 c) 0013H, a high to low transition on pin INT1 d) 0023H, a low to high transition on pin INT1

Last Answer : a) 000BH, a high to low transition on pin INT1

A data cannot flow between a store and i) a store ii) a process iii) an external entity A) i and iii B) i and ii C) ii and iii D) ii

Description : A data cannot flow between a store and i) a store ii) a process iii) an external entity A) i and iii B) i and ii C) ii and iii D) ii

Last Answer : A) i and iii

External Entities may be a A) Source of input data only B) Source of input data or destination of results C) Destination of results only D) Repository of data

Description : External Entities may be a A) Source of input data only B) Source of input data or destination of results C) Destination of results only D) Repository of data

Last Answer : B) Source of input data or destination of results

A rectangle in a DFD represents A) a process B) a data store C) an external entity D) an input unit

Description : A rectangle in a DFD represents A) a process B) a data store C) an external entity D) an input unit

Last Answer : C) an external entity

A data flow can A) Only emanate from an external entity B) Only terminate in an external entity C) May emanate and terminate in an external entity D) May either emanate or terminate in an external entity but not both

Description : A data flow can A) Only emanate from an external entity B) Only terminate in an external entity C) May emanate and terminate in an external entity D) May either emanate or terminate in an external entity but not both

Last Answer : C) May emanate and terminate in an external entity

Consider a 32 - bit microprocessor, with a 16 - bit external data bus, driven by an 8 MHz input clock. Assume that the microprocessor has a bus cycle whose minimum duration equals four input clock cycles. What is the maximum data transfer rate for this microprocessor? (A) 8x106 bytes/sec (B) 4x106 bytes/sec (C) 16x106 bytes/sec (D) 4x109 bytes/sec

Description : Consider a 32 - bit microprocessor, with a 16 - bit external data bus, driven by an 8 MHz input clock. Assume that the microprocessor has a bus cycle whose minimum duration equals four input clock cycles. What ... (A) 8x106 bytes/sec (B) 4x106 bytes/sec (C) 16x106 bytes/sec (D) 4x109 bytes/sec 

Last Answer : (B) 4x106 bytes/sec

Which of the following are the principles tasks of the linker? I. Resolve external references among separately compiled program units. II. Translate assembly language to machine code. III. Relocate code and data relative to the beginning of the program. IV. Enforce access-control restrictions on system libraries. (A) I and II (B) I and III (C) II and III (D) I and IV

Description : Which of the following are the principles tasks of the linker? I. Resolve external references among separately compiled program units. II. Translate assembly language to machine code. III. Relocate code and data relative to the beginning of ... (A) I and II (B) I and III (C) II and III (D) I and IV

Last Answer : (B) I and III

Which of the following is allowed in a C Arithmetic Instruction? A) [ ] B) { } C) ( ) D) None of the above

Description : Which of the following is allowed in a C Arithmetic Instruction? A) [ ] B) { } C) ( ) D) None of the above

Last Answer : C) ( )

CAI stands for ................ A) Computer Aided Instruction B) Computer Aided information C) Cost Added Information D) Computer Aided Infrastructure

Description : CAI stands for ................ A) Computer Aided Instruction B) Computer Aided information C) Cost Added Information D) Computer Aided Infrastructure

Last Answer : B) Computer Aided information

Which is not a typical program control instruction? (A) BR (B) JMP (C) SHL (D) TST

Description : Which is not a typical program control instruction? (A) BR (B) JMP (C) SHL (D) TST

Last Answer : (C) SHL

Computers can have instruction formats with (A) only two address and three address instructions (B) only one address and two address instructions (C) only one address, two address and three address instructions (D) zero address, one address, two address and three address instructions

Description : Computers can have instruction formats with (A) only two address and three address instructions (B) only one address and two address instructions (C) only one address, two address and three address instructions (D) zero address, one address, two address and three address instructions

Last Answer : (D) zero address, one address, two address and three address instructions 

A byte addressable computer has a memory capacity of 2 m Kbytes and can perform 2 n operations. An instruction involving 3 operands and one operator needs a maximum of (A) 3m bits (B) m + n bits (C) 3m + n bits (D) 3m + n + 30 bits

Description : A byte addressable computer has a memory capacity of 2 m Kbytes and can perform 2 n operations. An instruction involving 3 operands and one operator needs a maximum of (A) 3m bits (B) m + n bits (C) 3m + n bits (D) 3m + n + 30 bits

Last Answer : (D) 3m + n + 30 bits

The advantage of ............... is that it can reference memory without paying the price of having a full memory address in the instruction. (A) Direct addressing (B) Indexed addressing (C) Register addressing (D) Register Indirect addressing

Description : The advantage of ............... is that it can reference memory without paying the price of having a full memory address in the instruction. (A) Direct addressing (B) Indexed addressing (C) Register addressing (D) Register Indirect addressing

Last Answer : (D) Register Indirect addressing

The RST 7 instruction in 8085 microprocessor is equivalent to: (A) CALL 0010 H (B) CALL 0034 H (C) CALL 0038 H (D) CALL 003C H

Description : The RST 7 instruction in 8085 microprocessor is equivalent to: (A) CALL 0010 H (B) CALL 0034 H (C) CALL 0038 H (D) CALL 003C H

Last Answer : (C) CALL 0038 H

Suppose that the number of instructions executed between page faults is directly proportional to the number of page frames allocated to a program. If the available memory is doubled, the mean interval between page faults is also doubled. Further, consider that a normal instruction takes one micro second, but if a page fault occurs, it takes 2001 micro seconds. If a program takes 60 sec to run, during which time it gets 15000 page faults, how long would it take to run if twice as much memory were available? (A) 60 sec (B) 30 sec (C) 45 sec (D) 10 sec

Description : Suppose that the number of instructions executed between page faults is directly proportional to the number of page frames allocated to a program. If the available memory is doubled, the mean interval between page faults is also ... memory were available? (A) 60 sec (B) 30 sec (C) 45 sec (D) 10 sec

Last Answer : Answer: C Explanation: T = Ninstr x 1µs + 15,000 x 2,000 µs = 60s Ninstr x 1µs = 60,000,000 µs - 30,000,000 µs = 30,000,000 µs Ninstr = 30,000,000 The number of instruction ... doesn't mean that the program runs twice as fast as on the first system. Here, the performance increase is of 25%.

The ............... addressing mode is similar to register indirect addressing mode, except that an offset is added to the contents of the register. The offset and register are specified in the instruction. (A) Base indexed (B) Base indexed plus displacement (C) Indexed (D) Displacement

Description : The ............... addressing mode is similar to register indirect addressing mode, except that an offset is added to the contents of the register. The offset and register are specified in the instruction. (A) Base indexed (B) Base indexed plus displacement (C) Indexed (D) Displacement

Last Answer : (D) Displacement

The contents of Register (BL) and Register (AL) of 8085 microprocessor are 49H and 3AH respectively. The contents of AL, the status of carry flag (CF) and sign flag (SF) after executing 'SUB AL, BL' assembly language instruction, are (1) AL=0FH; CF=1; SF=1 (2) AL=F0H; CF=0; SF=0 (3) AL=F1H; CF=1; SF=1 (4) AL=1FH; CF=1; SF=1

Description : The contents of Register (BL) and Register (AL) of 8085 microprocessor are 49H and 3AH respectively. The contents of AL, the status of carry flag (CF) and sign flag (SF) after executing 'SUB AL, BL' assembly language instruction, are ( ... ; CF=0; SF=0 (3) AL=F1H; CF=1; SF=1 (4) AL=1FH; CF=1; SF=1

Last Answer : Answer: 3

…………… can be defined as data that has been processed into a form that is meaningful to the recipient and is of real or perceived value in current or prospective decisions. A) Information B) Data collection C) Internal data D) Sample data

Description : …………… can be defined as data that has been processed into a form that is meaningful to the recipient and is of real or perceived value in current or prospective decisions. A) Information B) Data collection C) Internal data D) Sample data

Last Answer : A) Information

When one object reference variable is assigned to another object reference variable then (A) a copy of the object is created. (B) a copy of the reference is created. (C) a copy of the reference is not created. (D) it is illegal to assign one object reference variable to another object reference variable.

Description : When one object reference variable is assigned to another object reference variable then (A) a copy of the object is created. (B) a copy of the reference is created. (C) a copy of the ... not created. (D) it is illegal to assign one object reference variable to another object reference variable.

Last Answer : (B) a copy of the reference is created.

Consider a database table R with attributes A and B. Which of the following SQL queries is illegal ? (A) SELECT A FROM R; (B) SELECT A, COUNT(*) FROM R; (C) SELECT A, COUNT(*) FROM R GROUP BY A; (D) SELECT A, B, COUNT(*) FROM R GROUP BY A, B;

Description : Consider a database table R with attributes A and B. Which of the following SQL queries is illegal ? (A) SELECT A FROM R; (B) SELECT A, COUNT(*) FROM R; (C) SELECT A, COUNT(*) FROM R GROUP BY A; (D) SELECT A, B, COUNT(*) FROM R GROUP BY A, B;

Last Answer : (B) SELECT A, COUNT(*) FROM R;

The performance of data communications network depends on .............. A) Number of users B) The hardware and software C) The transmission D) All of the above

Description : The performance of data communications network depends on .............. A) Number of users B) The hardware and software C) The transmission D) All of the above

Last Answer : D) All of the above

Testing of software with actual data and in actual environment is called (A) Alpha testing (B) Beta testing (C) Regression testing (D) None of the above

Description : Testing of software with actual data and in actual environment is called (A) Alpha testing (B) Beta testing (C) Regression testing (D) None of the above

Last Answer : (B) Beta testing

Superficially the term “object-oriented”, means that, we organize software as a (A) collection of continuous objects that incorporates both data structure and behaviour. (B) collection of discrete objects that incorporates both discrete structure and behaviour. (C) collection of discrete objects that incorporates both data structure and behaviour. (D) collection of objects that incorporates both discrete data structure and behaviour.

Description : Superficially the term object-oriented , means that, we organize software as a (A) collection of continuous objects that incorporates both data structure and behaviour. (B) collection of ... and behaviour. (D) collection of objects that incorporates both discrete data structure and behaviour.

Last Answer : (C) collection of discrete objects that incorporates both data structure and behaviour.

A software design is highly modular if : (A) cohesion is functional and coupling is data type. (B) cohesion is coincidental and coupling is data type. (C) cohesion is sequential and coupling is content type. (D) cohesion is functional and coupling is stamp type.

Description : A software design is highly modular if : (A) cohesion is functional and coupling is data type. (B) cohesion is coincidental and coupling is data type. (C) cohesion is sequential and coupling is content type. (D) cohesion is functional and coupling is stamp type.

Last Answer : (A) cohesion is functional and coupling is data type.

A software program that infers and manipulates existing knowledge in order to generate new knowledge is known as: (A) Data Dictionary (B) Reference Mechanism (C) Inference Engine (D) Control Strategy

Description : A software program that infers and manipulates existing knowledge in order to generate new knowledge is known as: (A) Data Dictionary (B) Reference Mechanism (C) Inference Engine (D) Control Strategy

Last Answer : (C) Inference Engine

Which of the following statement(s) is/are TRUE with regard to software testing? I. Regression testing technique ensures that the software product runs correctly after the changes during maintenance. II. Equivalence partitioning is a white-box testing technique that divides the input domain of a program into classes of data from which test cases can be derived. (1) only I (2) only II (3) both I and II (4) neither I nor II

Description : Which of the following statement(s) is/are TRUE with regard to software testing? I. Regression testing technique ensures that the software product runs correctly after the changes during maintenance. II. Equivalence partitioning is a ... (1) only I (2) only II (3) both I and II (4) neither I nor II

Last Answer : (1) only I 

When troubleshooting electronic equipment, you should use a high impedance multimeter ________________. A. to prevent excess current flow through the meter that would damage it B. for AC measurements only and a low resistance meter for DC measurements C. whenever a low impedance meter is not available, regardless of the components being tested D. so as not to load down the circuit and obtain erroneous voltage readings

Description : When troubleshooting electronic equipment, you should use a high impedance multimeter ________________. A. to prevent excess current flow through the meter that would damage it B. for AC measurements only ... being tested D. so as not to load down the circuit and obtain erroneous voltage readings

Last Answer : Answer: D