In 8051 an external interrupt 1 vector address is of ________ and causes of interrupt if ____.
a) 000BH, a high to low transition on pin INT1
b) 001BH, a low to high transition on pin INT1
c) 0013H, a high to low transition on pin INT1
d) 0023H, a low to high transition on pin INT1

1 Answer

Answer :

a) 000BH, a high to low transition on pin INT1

Related questions

Description : Serial port vector address is of _______. And causes an interrupt when ________. a) 0013H, either TI or RI flag is set b) 0023H, either TI or RI flag is reset c) 0013H, either TI or RI flag is reset d) 0023H, either TI or RI flag is set

Last Answer : a) 0013H, either TI or RI flag is set

Description : 8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH 17. If the __ pin is ___ , then we have the option ... b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal

Last Answer : c) EA, high, external, internal

Description : The external device is connected to a pin called the ______ pin on the processor chip. a. Interrupt b. Transfer c. Both d. None of these

Last Answer : a. Interrupt

Description : In 8051 which interrupt has highest priority? a)IE1 b)TF0 c)IE0 d)TF1

Last Answer : a)IE1

Description : In 8051 which interrupt has highest priority? a)IE1 b)TF0 c)IE0 d)TF1

Last Answer : c)IE0

Description : If the __ pin is ___ , then we have the option of using the ____ ROM or EPROM together with _____ memory and devices. a) EA, high, internal, external b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal

Last Answer : a) EA, high, internal, external

Description : Address line for TRAP is? a) 0023H b) 0024H c) 0033H

Last Answer : b) 0024H

Description : The interrupt vector table of 80386 has been allocated ______ space starting from _______ to _______. a) 1Kbyte, 00000H, 003FFH b) 2Kbyte, 10000H, 004FFH c) 3Kbyte, 01000H, 007FFH d) 4Kbyte, 01000H, 009FFH

Last Answer : c) 3Kbyte, 01000H, 007FFH

Description : In 8279, a scanned sensor matrix mode, if a sensor changes its state, the ___ line goes ____ to interrupt the CPU. a) CS, high b) A0, high c) IRQ, high d) STB, high

Last Answer : c) IRQ, high

Description : Serial port interrupt is generated, if ____ bits are seta) IE b) RI, IE c) IP, TI d) RI, TI

Last Answer : d) RI, TI

Description : Serial port interrupt is generated, if ____ bits are set a) IE b) RI, IE c) IP, TI d) RI, TI

Last Answer : a) IE

Description : Serial port interrupt is generated, if ____ bits are set a) IE b) RI, IE c) IP, TI d) RI, TI

Last Answer : d) RI, TI

Description : If ______ and ________ connections are made so that an error condition in 8087 can interrupt to the processor. a) BHE, RQ/GT1 b) BUSY, TEST c) INT, NMI d) RQ/GT0, RQ/GT1

Last Answer : c) INT, NMI

Description : ____ causes the address of the next microprocessor to be obtained from the memory: a. CRJA b. ROM c. MAP d. HLT

Last Answer : c. MAP

Description : In modes 2 and 3, if _____ bit of SCON bit is set will causes enable multiprocessor communication and is of ____ bit address. a) SM1, 9EH b) TB8 , 9CH c) SM2 , 9DH d) SM0, 9FH

Last Answer : c) SM2 , 9DH

Description : Which pin of port 3 is has an alternative function as write control signal for external data memory? a) P3.8 b) P3.3 c) P3.6 d) P3.1

Last Answer : d) P3.1

Description : Which pin of port 3 is has an alternative function as write control signal for external data memory? a) P3.8 b) P3.3 c) P3.6 d) P3.1

Last Answer : c) P3.6

Description : If ______input pin of 80386 if activated, allows address pipelining during 80386 bus cycles. a) BS16 b) NA c) PEREQ d) ADS

Last Answer : a) BS16

Description : In 8051,After reset the SP register is initialized to address________. a. 8H b) 9H c) 7H

Last Answer : c) 7H

Description : SP of 8051 is of ___ wide and it is loaded with the default value of ___ after reset. a) 2 byte, 08H b) 8 bit, 07H c) 1 byte, 09H d) 8 bit, 06H

Last Answer : d) 8 bit, 06H

Description : The 8051 microcontroller is of ___pin package as a ______ processor. a) 30, 1byte b) 20, 1 byte c) 40, 8 bit

Last Answer : c) 40, 8 bit

Description : The 8051 microcontroller is of ___pin package as a ______ processor. a) 30, 1byte b) 20, 1 byte c) 40, 8 bit d) 40, 8 byte

Last Answer : c) 40, 8 bit

Description : Explain processes of interrupt enabling and disabling in 8051.

Last Answer : Interrupts are the events that temporarily suspend the main program, pass the control to the external sources and execute their task. It then passes the control to the main program where it had left off. ... interrupts. Its bit sequence and their meanings are shown in the following figure.

Description : A___ on this pin indicates a memory operation: a. Low b. High c. Medium d. None of these

Last Answer : a. Low

Description : Vector address of TRAP a) 24H b) 36H c) 24 d) 18H

Last Answer : c) 24

Description : What is meant by interrupt?

Last Answer : Interrupt is an external signal that causes a microprocessor to jump to a specific subroutine.

Description : List the four instructions which control the interrupt structure of the 8085 microprocessor.

Last Answer : • DI ( Disable Interrupts ) • EI ( Enable Interrupts ) • RIM ( Read Interrupt Masks ) • SIM ( Set Interrupt Masks )

Description : Which are the flags of status register: a. Over flow flag b. Carry flag c. Half carry flag d. Zero flag e. Interrupt flag f. Negative flag g. All of these

Last Answer : g. All of these

Description : In 8096 we have _____interrupt sources and _______ interrupt vectors. a) 18, 8 b) 21, 6 c) 21, 8 d) 16, 8

Last Answer : c) 21, 8

Description : 8086 is interfaced to two 8259s (Programmable interrupt controllers). If 8259s are in master slave configuration the number of interrupts available to the 8086 microprocessor is a) 8 b) 16 c) 15 d) 64

Last Answer : a) 8

Description : In 8096 we have _____interrupt sources and _______ interrupt vectors. a) 18, 8 b) 21, 6 c) 21, 8 d) 16, 8

Last Answer : c) 21,

Description : What is meant by Maskable interrupts? a) An interrupt which can never be turned off. b) An interrupt that can be turned off by the programmer. c) none

Last Answer : b) An interrupt that can be turned off by the programmer.

Description : RIM is used to check whether, ______ a) The write operation is done or not b) The interrupt is Masked or not c) a & b

Last Answer : b) The interrupt is Masked or not

Description : What is SIM? a) Select Interrupt Mask b) Sorting Interrupt Mask c) Set Interrupt Mask.

Last Answer : c) Set Interrupt Mask.

Description : Which interrupt is not level sensitive in 8085? a) RST6.5 is a raising edge-trigging interrupt. b) RST7.5 is a raising edge-trigging interrupt. c) a & b.

Last Answer : b) RST7.5 is a raising edge-trigging interrupt.

Description : Which interrupt has the highest priority? a) INTR b) TRAP c) RST6.5

Last Answer : c) RST6.5

Description : In linear decoding address bus of 16-bit wide can connect only ____ of RAM. a. 16 KB b. 6KB c. 12KB d. 64KB

Last Answer : b. 6KB

Description : In 8096, CCB bit 3 is ____. a) write strobe mode select b) address valid strobe select c) bus width select d) Internal read control mode

Last Answer : c) bus width select

Description : In 8096, CCB bit 3 is ____. a) write strobe mode select b) address valid strobe select c) bus width select d) Internal read control mode

Last Answer : b) address valid strobe select

Description : Which bus transfer singles from the CPU to external device and others that carry singles from external device to the CPU: a. Control bus b. Data bus c. Address bus d. None of these

Last Answer : a. Control bus

Description : Which of the following instruction perform the move accumulator to external RAM of 16bit address? a) MOV @ DPTR, A b) MOVX @ Ri, A c) MOV A, @ Ri d) MOVX @ DPTR, A

Last Answer : c) MOV A, @ Ri

Description : State the alternate pin functions of port 3 of 8051.

Last Answer :  the alternate pin functions of port 3 of 8051 :

Description : Explain function of following pins of 8051 (i) Pin 31 (ii) Pin 29 (iii) Pin 21-28 

Last Answer : i) Pin 31-EA : It is and active low I/P to 8051 microcontroller. When (EA)= 0, then 8051 microcontroller access from external program memory (ROM) only. When (EA) = 1, then it access internal ... /Output, when external memory is interfaced, PORT 2 pins act as the higher-order address bus. (A8-A15)

Description : The ________ ensures that only one IC is active at a time to avoid a bus conflict caused by two ICs writing different data to the same bus.A.control busB.control instructionsC. address decoder D.CPU

Last Answer : C. address decoder

Description : In 8086 microprocessor , the address bus is ________ bit wide A. 12 bit B. 10 bit C. 16 bit D. 20 bit

Last Answer : In 8086 microprocessor, the address bus is 20 bit

Description : In ADC 0808 if _______ pin high enables output. a) EOC b) I/P0-I/P7 c) SOC d) OE

Last Answer : b) I/P0-I/P7

Description : is an external hardware event which causes the CPU to interrupt the current instruction sequence: a. Input interrupt b. Output interrupt c. Both d. None of these

Last Answer : c. Both

Description : Which are the not causes of the interrupt: a. In any single device b. In processor poll devices c. Itis an external analogy to exception d. None of these

Last Answer : c. Itis an external analogy to exception

Description : In 8279 Strobed input mode, the control line goes low. The data on return lines is strobed in the ____. a) FIFO byte by byte b) FILO byte by byte c) LIFO byte by byte d) LILO byte by byte.

Last Answer : a) FIFO byte by byte

Description : Which are the causes of the interrupt: a. In any single device b. In processor poll devices c. In a device whose ID number is stored on the address bus d. Allof these

Last Answer : d. Allof these