Description : Mnemonic refers to. a Instructions b. Code c. Symbolic codes d Assembler
Last Answer : c. Symbolic codes
Description : Which language is termed as the symbolic depiction used for indicating the series: a. Random transfer language b. Register transfer language c. Arithmetic transfer language d. __ Allof these
Last Answer : b. Register transfer language
Description : For each micro operation the control unit generates set of_ signals. a. Control b. Address c. Data d. None of these
Last Answer : a. Control
Description : Addresses in control memory is made by for each register group: a. Address select logic b. Data select logic c. Control select logic d. All of these
Last Answer : a. Address select logic
Description : What type of circuit is used by control memory to interconnect registers. a. Data routing circuit b. Address routing circuit c. Control routing circuit d. None of the these
Last Answer : a. Data routing circuit
Description : Copy of data in cache memory is called. a. Datacache b. Execution cache c. Address cache d. Control cache
Last Answer : a. Datacache
Description : In cache memory hit rate indicates. a. Data from requested address is not available b. Data from requested address is available c. Control from requested address is available d. Address from requested address is not available
Last Answer : b. Data from requested address is available
Description : Which control refers to the track of the address of instructions. a. Data control b. Register control c. Program control d. None of these
Last Answer : c. Program control
Description : By whom address of external function in the assembly source file supplied by __ when activated: a. Assembler b. Linker c. Machine d. Code
Last Answer : b. Linker
Description : Source statements consist of 5fields in microinstruction source code are: a. Lable b. Micro-ops c. CD-spec d. BR-spec e. Address f. All of these
Last Answer : f. All of these
Description : An instruction code must specify the address of the__. a. Opecode b. Operand c. Both d. None
Last Answer : b. Operand
Description : How many parts of floating point representation of a number consists. a. 4 b 2 Cc. 3 d 5
Last Answer : b 2
Description : IR stands for. a. Input representation b. Intermediate representation c. Both d. None
Last Answer : b. Intermediate representation
Description : How many modes the address in control memory are divided. a 2 b 3 c. 5 d 7
Last Answer : a 2
Description : Who change the address in the program counter and cause the flow of control to be altered: a Shift manipulation b. Circular manipulation c. Program control instruction d. __ Allof these
Last Answer : c. Program control instruction
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : The contents of the program counter isthe __——__—oof the instruction to be run. a. Data b. Address c. Counter d. None of these
Last Answer : b. Address
Description : Which operation puts memory address in memory address register and data in DR. a Memory read b. Memory write c Both d. None
Last Answer : b. Memory write
Description : In cache memory miss rate indicates. a. Availability of requested data b. Availability of requested address c. Non-Availability of requested data d. Non-Availability of requested address
Last Answer : c. Non-Availability of requested data
Description : Various machine level components are: a. Address register > Program counter c Data register d. Accumulator register e. Memory of 2K,16 bits/word RAM f. Multiplexers g. Allof these
Last Answer : g. Allof these
Description : Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU
Last Answer : b. Main memory
Description : The stack pointer is maintained in a : a. Data b. Register c. Address d. None of these
Last Answer : b. Register
Description : Which code used to represent numbers, letters, punctuation marks as well as control characters: a. ASCII b. EBCDIC c. Both d. None of these
Last Answer : a. ASCII
Description : Abbreviation ASCII stands for: a. American standard code for information interchange b. Abbreviation standard code for information interchange c. Both d. None of these
Last Answer : a. American standard code for information interchange
Description : Which code used in transferring coded information from keyboards and to computer display and printers: a. ASCII b. EBCDIC c. Both d. None of these
Description : Each check bit is grouped with the information bits as specified by a__ a. Parity check code b. Parity check matrix c. Parity check bit d. All of these
Last Answer : b. Parity check matrix
Description : isacommand given to a computer to perform a specified operation on some given data. a. Aninstruction b. Command c. Code d. None of these
Last Answer : a. Aninstruction
Description : Before checking the program for errors in translating code into machine language the high level language code is loaded into __ a. Register b. Memory c. Data d. CPU
Last Answer : b. Memory
Description : Draw the general layout of Pneumatic system and its symbolic representation?
Last Answer : Pneumatic systems are the power transmitting assemblies employing pressurized air to transmit energy from an energy generating source to the application area. Pneumatic system has air as the working medium ( ... figure below. Symbolic representation of general layout of pneumatic system
Description : Which variable can give the concrete form to the representation of the transition model? a) Single variable b) Discrete state variable c) Random variable d) Both Single & Discrete state variable
Last Answer : d) Both Single & Discrete state variable
Description : Control memory is part of __ that has addressable storage registers and used as temporary storage for data. a. ROM b. RAM c. CPU d. Memory
Last Answer : b. RAM
Description : Outputs of instruction/data path in CU are. a. Reg R/W b. Load/Reg-Reg c. ALU function select d. Load control e. Read control f. IR Latch g. JUMP/Branch/Next PC h_ = All of these
Last Answer : h_ = All of these
Description : Which are the operation of versatility: a. exchange of information with the outside world via I/O device b. Transfer of data internally with in the central processing unit c. Performs of the basic arithmetic operations d. = Allof these
Last Answer : d. = Allof these
Description : Ininstruction formats the information required by the _ for execution: a. ALU b. CPU Cc. RISC d. DATA
Last Answer : b. CPU
Description : The simplest method of controlling sequence of instruction execution is to have each instruction explicitly specify: a. The address of next instruction to be run b. Address of previous instruction c. Both a &b d. None of these
Last Answer : a. The address of next instruction to be run
Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next
Last Answer : c. Instruction register, incremented and next
Description : Which is addressed by sign extending the 16-bit displacement to 32-bit: a. Memory address b. Effective memory address c. Both a and b d. None of these
Last Answer : b. Effective memory address
Description : Which are the causes of the interrupt: a. In any single device b. In processor poll devices c. In a device whose ID number is stored on the address bus d. Allof these
Last Answer : d. Allof these
Description : The register that includes the address of the memory unit is termed asthe _ a. MAR b PC Cc. IR d. None of these
Last Answer : a. MAR
Description : In memory transfer location address is supplied by that puts this on address bus. a. ALU b. CPU Cc. MAR d. MDR
Description : In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these
Last Answer : ce. MAR
Description : The memory bus is also referred as _ a. Databus b. Address bus c. Memory bus d. — Allof these
Last Answer : a. Databus
Description : address is not assigned by linker. a. Absolute b. Relative c. Botha &b a None of these
Last Answer : a. Absolute
Description : address is provided by linker to modules linked together that starting from. | a. Absolute and 0 b. Relative and 0 c. Relative and 1 d. Relative and 3
Last Answer : b. Relative and 0
Description : shave addresses where instructions are stored along with address of working storage: a. _ Relative entities b. Absolute entities c. Botha &b d. None of these
Last Answer : a. _ Relative entities
Description : ___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory
Last Answer : b. Microprocessor
Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine
Last Answer : d. Executable, Stack and Subroutine
Description : Micro-orders generate the_ __ address of operand and execute instruction and prepare for fetching next instruction from the main memory: a. Physical b. Effective c. Logical d. all of above
Last Answer : b. Effective
Description : Invalidation writes only to___ and erases previously residing address in memory: a. Folders b. Memory c. Directory d. Files
Last Answer : c. Directory
Description : Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer
Last Answer : Cc. Instruction register