Description : The correction to be applied in decimal adder to the generated sum is (A) 00101 (B) 00110 (C) 01101 (D) 01010
Last Answer : Ans: B The correction to be applied in decimal adder to the generated sum is 00110. When the four bit sum is more than 9 then the sum is invalid. In such cases, add +6(i.e. 0110) to the ... the six invalid states. If a carry is generated when adding 6, add the carry to the next four bit group .
Description : The binary equivalent of hexadecimal 10 is ________. 112) A) 00010000 B) 00110 C) 1010 D) 11000
Last Answer : A) 00010000
Description : Which one of the following represents the binary equivalent of the decimal number 25? (A) 11011 (B) 10101 (C) 01101 (D) 11001
Last Answer : Answer: D
Description : The decimal equivalent of Binary number 10101 is (A) 21 (B) 31 (C) 26 (D) 28
Last Answer : (A) 21
Description : If the input to T-flipflop is 100 Hz signal, the final output of the three T-flipflops in cascade is (A) 1000 Hz (B) 500 Hz (C) 333 Hz (D) 12.5 Hz.
Last Answer : (D) 12.5 Hz.
Description : The output of a logic gate is 1 when all its inputs are at logic 0. the gate is either (A) a NAND or an EX-OR (B) an OR or an EX-NOR (C) an AND or an EX-OR (D) a NOR or an EX-NOR
Last Answer : (D) a NOR or an EX-NOR
Description : The NOR gate output will be low if the two inputs are (A) 00 (B) 01 (C) 10 (D) 11
Last Answer : A
Description : Which TTL logic gate is used for wired ANDing (A) Open collector output (B) Totem Pole (C) Tri state output (D) ECL gates
Last Answer : Ans: A Open collector output.
Description : The NAND gate output will be low if the two inputs are (A) 00 (B) 01 (C) 10 (D) 11
Last Answer : (D) 11
Description : An eight stage ripple counter uses a flip-flop with propagation delay of 75 nanoseconds. The pulse width of the strobe is 50ns. The frequency of the input signal which can be used for proper operation of the counter is approximately (A) 1 MHz. (B) 500 MHz. (C) 2 MHz. (D) 4 MHz.
Last Answer : Maximum time taken for all flip-flops to stabilize is 75ns x 8 + 50 = 650ns. Frequency of operation must be less than 1/650ns = 1.5 MHz.
Description : The output of a JK flipflop with asynchronous preset and clear inputs is 1'. The output can be changed to 0' with one of the following conditions. (A) By applying J = 0, K = 0 and using a clock. (B) ... (C) By applying J = 1, K = 1 and using the clock. (D) By applying a synchronous preset input.
Last Answer : Ans: C Preset state of JK Flip-Flop =1 With J=1 K=1 and the clock next state will be complement of the present state.
Description : When the set of input data to an even parity generator is 0111, the output will be (A) 1 (B) 0 (C) Unpredictable (D) Depends on the previous input
Last Answer : Ans: B In even parity generator if number of 1 is odd then output will be zero.
Description : In successive-approximation A/D converter, offset voltage equal to 1/2 LSB is added to the D/A converter's output. This is done to (A) Improve the speed of operation. (B) Reduce the maximum ... Increase the number of bits at the output. (D) Increase the range of input voltage that can be converted
Last Answer : (B) Reduce the maximum quantization error.
Description : A universal logic gate is one, which can be used to generate any logic function. Which of the following is a universal logic gate? (A) OR (B) AND (C) XOR (D) NAND
Last Answer : Ans: D NAND can generate any logic function.
Description : DeMorgan’s first theorem shows the equivalence of (A) OR gate and Exclusive OR gate. (B) NOR gate and Bubbled AND gate. (C) NOR gate and NAND gate. (D) NAND gate and NOT gate
Last Answer : (B) NOR gate and Bubbled AND gate.
Description : The gates required to build a half adder are (A) EX-OR gate and NOR gate (B) EX-OR gate and OR gate (C) EX-OR gate and AND gate (D) Four NAND gates.
Last Answer : (C) EX-OR gate and AND gate
Description : Which set of truth table input signals will result in an output signal value of 1 from the 'AND' gate as shown in the illustration? EL-0035 A. 1-Jan B. Jan-00 C. 0-1 D. 0-0
Last Answer : Answer: A
Description : How many two input AND gates and two input OR gates are required to realize Y = BD+CE+AB (A) 1, 1 (B) 4, 2 (C) 3, 2 (D) 2, 3
Last Answer : Ans: A There are three product terms, so three AND gates of two inputs are required. As only two input OR gates are available, so two OR gates are required to get the logical sum of three product terms.
Description : How many two-input AND and OR gates are required to realize Y=CD+EF+G (A) 2,2. (B) 2,3. (C) 3,3. (D) none of these.
Last Answer : Ans: A Y=CD+EF+G Number of two input AND gates=2 Number of two input OR gates = 2 One OR gate to OR CD and EF and next to OR of G & output of first OR gate.
Description : The commercially available 8-input multiplexer integrated circuit in the TTL family is (A) 7495. (B) 74153. (C) 74154. (D) 74151.
Last Answer : Ans: B MUX integrated circuit in TTL is 74153.
Description : For JK flipflop J = 0, K=1, the output after clock pulse will be (A) 1. (B) no change. (C) 0. (D) high impedance.
Last Answer : Ans: C J=0, K=1, these inputs will reset the flip-flop after the clock pulse. So whatever be the previous output, the next state will be 0.
Description : A full adder logic circuit will have (A) Two inputs and one output. (B) Three inputs and three outputs. (C) Two inputs and two outputs. (D) Three inputs and two outputs.
Last Answer : Ans: D A full adder circuit will add two bits and it will also accounts the carry input generated in the previous stage. Thus three inputs and two outputs (Sum and Carry) are there.
Description : The output of SR flip flop when S=1, R=0 is (A) 1 (B) 0 (C) No change (D) High impedance
Last Answer : Ans: A As for the SR flip-flop S=set input R=reset input ,when S=1, R=0, Flip-flop will be set.
Description : For JK flip flop with J=1, K=0, the output after clock pulse will be (A) 0. (B) 1. (C) high impedance. (D) no change.
Last Answer : (B) 1.
Description : Which terminology deals with the excitation or stimulus applied to the system from an external source for the generation of an output? a. Input signal b. Output signal c. Error signal d. Feedback signal
Last Answer : Ans: A
Description : This bistable electronic device assumes one of two stable output states, depending upon the state of the most recently applied input signal. In computer systems this device is used for storing information. Name this common electronic device.
Last Answer : ANSWER: FLIP-FLOP or TOGGLE
Description : In a logic circuit, the NOT gate function _____________. A. does not alter a logical input B. serves to amplify a given signal level C. must be accomplished with a common collector transistor arrangement D. reverses an input logic condition
Description : An FET has a gate source bias of 2 V. The ac input signal is ± 1.2 V. The class of operation is A) A B) B C) C D) AB
Last Answer : D) AB
Description : According to WikiLeaks Japanese authorities serially ignored warnings on security lapses in nuclear plants - Gross negligence?
Last Answer : answer:I doubt this situation is unique to these plants or to Japan. There are plants in the US that are also built near fault lines. I'm not sure outrage is the right response. There has ... these risks outweigh the benefits from using this energy source (which will run out in 100 years anyway)?
Description : A two-input X-OR gate will produce a HIGH output when the inputs are at what logic levels?
Last Answer : . One or the other of the inputs must be HIGH, but not both at the same time.
Description : What is the output Boolean expression for an AND gate with A and B as inputs when the B input is inverted?
Last Answer : AB
Description : The output of two inputs OR gate is zero only when: (a) Both are one (b) Both are zero (c) Either input is 1 (d) None
Last Answer : (b) Both are zero
Description : The output of an exclusive–NOR gate is 1. Which input combination is correct? (1) A = 1, B = 0 (2) A = 0, B = 1 (3) A = 0, B = 0 (4) None of these
Last Answer : The output of an exclusive–NOR gate is 1. Which input combination is correct? (1) A = 1, B = 0 (2) A = 0, B = 1 (3) A = 0, B = 0 (4) None of these
Description : The output of a 2-input NAND gate with high at both the inputs will be • High • Low • High & low • None of the above.
Last Answer : The output of a 2-input NAND gate with high at both the inputs will be Low
Description : The basic logic gate whose output is the complement of the input is the: - a) OR gate b) AND gate c) inverter d) comparator
Last Answer : The basic logic gate whose output is the complement of the input is the: - inverter
Description : 11001, 1001 and 111001 correspond to the 2’s complement representation of which one of the following sets of number? (1) 25, 9 and 57 respectively (2) –6, –6 and –6 respectively (3) –7, –7 and –7 respectively (4) –25, –9 and –57 respectively
Last Answer : -7, -7, -7
Description : Convert the binary equivalent 10101 to its decimal equivalent. a) 21 b) 12 c) 22 d) 31
Last Answer : Answer: a Explanation: To convert a binary number to its decimal equivalent follow these steps : 2 4 * 1 + 23 * 0 + 22 *1 + 21 * 0 + 20 * 1 = 21. Therefore, the answer is 21
Description : Define Asynchronous sequential circuit?
Last Answer : In asynchronous sequential circuits change in input signals can affect memory element at any instant of time.
Description : Define synchronous sequential circuit
Last Answer : In synchronous sequential circuits, signals can affect the memory elements only at discrete instant of time.
Description : What are the different types of shift type?
Last Answer : There are five types. They are, Serial In Serial Out Shift Register Serial In Parallel Out Shift Register Parallel In Serial Out Shift Register Parallel In Parallel Out Shift Register Bidirectional Shift Register
Description : Define shift registers.
Last Answer : The binary information in a register can be moved from stage to stage within the register or into or out of the register upon application of clock ... arithmetic and logic operations used in microprocessors. This gives rise to group of registers called shift registers.
Description : Define registers.
Last Answer : A register is a group of flip-flops flip-flop can store one bit information. So an n-bit register has a group of n flip-flops and is capable of storing any binary information/number containing n-bits.
Description : What is a master-slave flip-flop?
Last Answer : A master-slave flip-flop consists of two flip-flops where one circuit serves as a master and the other as a slave.
Description : What is edge-triggered flip-flop?
Last Answer : The problem of race around condition can solved by edge triggering flip flop. The term edge triggering means that the flip-flop changes state either at the positive ... negative edge of the clock pulse and it is sensitive to its inputs only at this transition of the clock.
Description : Define race around condition.
Last Answer : In JK flip-flop output is fed back to the input. Therefore change in the output results change in the input. Due to this in the positive half of the clock pulse if both J and K are high then output toggles continuously. This condition iscalled ‘race around condition’.
Description : What is the operation of T flip-flop?
Last Answer : T flip-flop is also known as Toggle flip-flop. • When T=0 there is no change in the output. • When T=1 the output switch to the complement state (ie) the output toggles.
Description : What is the operation of JK flip-flop?
Last Answer : When K input is low and J input is high the Q output of flip-flop is set. When K input is high and J input is low the Q output of flip-flop is reset. When both the inputs ... are high it is possible to set or reset the flip-flop (ie) the output toggle on the next positive clock edge.
Description : What is the operation of D flip-flop?
Last Answer : In D flip-flop during the occurrence of clock pulse if D=1, the output Q is set and if D=0, the output is reset.
Description : What are the different types of flip-flop?
Last Answer : There are various types of flip flops. Some of them are mentioned below they are, RS flip-flop SR flip-flop D flip-flop JK flip-flop T flip-flop
Description : Define Flip flop.
Last Answer : The basic unit for storage is flip flop. A flip-flop maintains its output state either at 1 or 0 until directed by an input signal to change its state.