Description : The output of a JK flipflop with asynchronous preset and clear inputs is 1'. The output can be changed to 0' with one of the following conditions. (A) By applying J = 0, K = 0 and using a clock. (B) ... (C) By applying J = 1, K = 1 and using the clock. (D) By applying a synchronous preset input.
Last Answer : Ans: C Preset state of JK Flip-Flop =1 With J=1 K=1 and the clock next state will be complement of the present state.
Description : For JK flipflop J = 0, K=1, the output after clock pulse will be (A) 1. (B) no change. (C) 0. (D) high impedance.
Last Answer : Ans: C J=0, K=1, these inputs will reset the flip-flop after the clock pulse. So whatever be the previous output, the next state will be 0.
Description : An eight stage ripple counter uses a flip-flop with propagation delay of 75 nanoseconds. The pulse width of the strobe is 50ns. The frequency of the input signal which can be used for proper operation of the counter is approximately (A) 1 MHz. (B) 500 MHz. (C) 2 MHz. (D) 4 MHz.
Last Answer : Maximum time taken for all flip-flops to stabilize is 75ns x 8 + 50 = 650ns. Frequency of operation must be less than 1/650ns = 1.5 MHz.
Description : When an input signal A=11001 is applied to a NOT gate serially, its output signal is (A) 00111. (B) 00110. (C) 10101. (D) 11001.
Last Answer : When an input signal A=01001 is applied to a NOT gate serially , it's output signal is
Description : When the set of input data to an even parity generator is 0111, the output will be (A) 1 (B) 0 (C) Unpredictable (D) Depends on the previous input
Last Answer : Ans: B In even parity generator if number of 1 is odd then output will be zero.
Description : In successive-approximation A/D converter, offset voltage equal to 1/2 LSB is added to the D/A converter's output. This is done to (A) Improve the speed of operation. (B) Reduce the maximum ... Increase the number of bits at the output. (D) Increase the range of input voltage that can be converted
Last Answer : (B) Reduce the maximum quantization error.
Description : If the frequency spectrum of a signal has a bandwidth of500 Hz with thehighest frequency at 600 Hz, what shouldbe the samplingrate, according to the Nyquist theorem? A) 200 samples/s B) 500 samples/s C) 1000 samples/s D) 1200 samples/s
Last Answer : 1200 samples/s
Description : A full adder logic circuit will have (A) Two inputs and one output. (B) Three inputs and three outputs. (C) Two inputs and two outputs. (D) Three inputs and two outputs.
Last Answer : Ans: D A full adder circuit will add two bits and it will also accounts the carry input generated in the previous stage. Thus three inputs and two outputs (Sum and Carry) are there.
Description : What is the standard test tone used for audio measurements? A. 100 Hz B. 500 Hz C. 1000 Hz D. 2000 Hz
Last Answer : C. 1000 Hz
Description : Convert the decimal number 10.5 to binary. 92) A) 1100.1000 B) 1010.0101 C) 1010.1000 D) 1011.1000
Last Answer : C) 1010.1000
Description : The decimal equivalent of the BCD value 0111 0110 1000 is ________. 124) A) 70810 B) 17210 C) 76810 D) 6871
Last Answer : C) 76810
Description : The decimal equivalent of the BCD value 1000 0110 is ________. 118) A) 8610 B) 7610 C) 8810 D) 8110
Last Answer : A) 8610
Description : Which binary value equals 20? 72) A) 0100 B) 0001 C) 1000 D) 0000
Last Answer : B) 0001
Description : Which binary value equals 2-3? 69) A) 0011.1000 B) 0000.0010 C) 0000.0100 D) 0000.0011
Last Answer : B) 0000.0010
Description : Which binary value equals 21? 65) A) 0100 B) 0010 C) 0001 D) 1000
Last Answer : B) 0010
Description : Which binary value equals 2-1? 61) A) 1.0000 B) 0.0010 C) 0.0001 D) 0.1000
Last Answer : D) 0.1000
Description : The BCD equivalent of decimal 912 is ________. 60) A) 1001 0001 0010BCD B) 1001 1000 0001BCD C) 0111 1111 1110BCD D) 0010 001 1001BCD
Last Answer : A) 1001 0001 0010BCD
Description : Which binary value equals 2-2? 13) A) 0000.0010 B) 0010.0000 C) 0000.1000 D) 0000.010
Last Answer : D) 0000.010
Description : The excess 3 code of decimal number 26 is (A) 0100 1001 (B) 01011001 (C) 1000 1001 (D) 01001101
Last Answer : Ans: B (26)10 in BCD is ( 00100110 ) BCD Add 011 to each BCD 01011001 for excess – 3
Description : How many two input AND gates and two input OR gates are required to realize Y = BD+CE+AB (A) 1, 1 (B) 4, 2 (C) 3, 2 (D) 2, 3
Last Answer : Ans: A There are three product terms, so three AND gates of two inputs are required. As only two input OR gates are available, so two OR gates are required to get the logical sum of three product terms.
Description : How many two-input AND and OR gates are required to realize Y=CD+EF+G (A) 2,2. (B) 2,3. (C) 3,3. (D) none of these.
Last Answer : Ans: A Y=CD+EF+G Number of two input AND gates=2 Number of two input OR gates = 2 One OR gate to OR CD and EF and next to OR of G & output of first OR gate.
Description : The commercially available 8-input multiplexer integrated circuit in the TTL family is (A) 7495. (B) 74153. (C) 74154. (D) 74151.
Last Answer : Ans: B MUX integrated circuit in TTL is 74153.
Description : The output of SR flip flop when S=1, R=0 is (A) 1 (B) 0 (C) No change (D) High impedance
Last Answer : Ans: A As for the SR flip-flop S=set input R=reset input ,when S=1, R=0, Flip-flop will be set.
Description : For JK flip flop with J=1, K=0, the output after clock pulse will be (A) 0. (B) 1. (C) high impedance. (D) no change.
Last Answer : (B) 1.
Description : The NOR gate output will be low if the two inputs are (A) 00 (B) 01 (C) 10 (D) 11
Last Answer : A
Description : Which TTL logic gate is used for wired ANDing (A) Open collector output (B) Totem Pole (C) Tri state output (D) ECL gates
Last Answer : Ans: A Open collector output.
Description : The output of a logic gate is 1 when all its inputs are at logic 0. the gate is either (A) a NAND or an EX-OR (B) an OR or an EX-NOR (C) an AND or an EX-OR (D) a NOR or an EX-NOR
Last Answer : (D) a NOR or an EX-NOR
Description : The NAND gate output will be low if the two inputs are (A) 00 (B) 01 (C) 10 (D) 11
Last Answer : (D) 11
Description : What is the operation of T flip-flop?
Last Answer : T flip-flop is also known as Toggle flip-flop. • When T=0 there is no change in the output. • When T=1 the output switch to the complement state (ie) the output toggles.
Description : Human ear is most sensitive to noise in the following frequency ranges: (A) 1-2 KHz (B) 100-500 Hz (C) 10-12 KHz (D) 13-16 KHz
Last Answer : (A) 1-2 KHz
Description : How many address bits are required to represent 4K memory (A) 5 bits. (B) 12 bits. (C) 8 bits. (D) 10 bits.
Last Answer : (B) 12 bits.
Description : Convert octal 100 to binary. 102) A) 10000000 B) 1100100 C) 111111110 D) 01000000
Last Answer : 01000000
Description : Convert the decimal number 0.0625 to binary. 100) A) 0000.0111 B) 0000.1110 C) 0000.0011 D) 0000.0001
Last Answer : D) 0000.0001
Description : The hexadecimal number ‘A0’ has the decimal value equivalent to (A) 80 (B) 256 (C) 100 (D) 160
Last Answer : (D) 160
Description : What is the optimum reverberation time at 500 to 1000 Hz of an auditorium? A. 0.9 to 1.1 s B. 1.4 to 1.6 s C. 1.5 to 1.6 s D. 1.6 to 1.8 s
Last Answer : D. 1.6 to 1.8 s
Description : Convert decimal 12 to octal. 75) A) 168 B) 128 C) 108 D) 148
Last Answer : D) 148
Description : Convert octal 12 to binary. 17) A) 010001 B) 001111 C) 001010 D) 001100
Last Answer : C) 001010
Description : Convert the decimal number 12.125 to binary. 12) A) 1100.0110 B) 1110.0010 C) 1100.0010 D) 1010.1100
Last Answer : C) 1100.0010
Description : How many address bits are required to represent a 32 K memory (A) 10 bits. (B) 12 bits. (C) 14 bits. (D) 16 bits.
Last Answer : (D) 16 bits.
Description : Which of the following memories stores the most number of bits (A) a 5M×8 memory. (B) a 1M × 16 memory. (C) a 5M × 4 memory. (D) a 1M ×12 memory.
Last Answer : Ans: A 5Mx8 = 5 x 220 x 8 = 40M (max)
Description : A 1 Mhz carrier is amplitude modulated by a pure 200-Hz audio test tone. Which of the following combinations of frequencies represent the total content of the AM signal? A. 1 MHz and 200 Hz B. 1 MHz and 1000.2 kHz C. 999.8 kHz, 1000 kHz, and 1000.2 kHz D. 999.8 kHz and 1000.2 kHz
Last Answer : C. 999.8 kHz, 1000 kHz, and 1000.2 kHz
Description : In a circuit such as that shown in figure 3-15, if R1 has a value of 100 ohms and R2 has a value of 1 kilohm and the input signal is at a value of + 5 millivolts, what is the value of the output signal?
Last Answer : 50 millivolts.
Description : Total cost of a product: Rs. 10,000 Profit: 25% on Selling Price Profit is: (a) Rs. 2,500 (b) Rs. 3,000 (c) Rs. 3,333 (d) Rs. 2,000
Last Answer : (b) Rs. 2,80,000
Description : If the electricity represented by the wave form in 'B' were applied to the left side of the illustrated circuit, the output on the right side would be ____________. EL-0064 A. direct current with the ... lower lead D. clipped to a value equal to the square root of 3 times the input voltage value
Last Answer : Answer: C
Description : In a full wave rectifier with input frequency of 50 Hz, the frequency of the output is: (1) 50 Hz (2) 100 Hz (3) 150 Hz (4) 200 Hz
Last Answer : In a full wave rectifier with input frequency of 50 Hz, the frequency of the output is: 100 Hz
Description : 1m3 of an ideal gas at 500 K and 1000 kPa expands reversibly to 5 times its initial volume in an insulated container. If the specific heat capacity (at constant pressure) of the gas is 21 J/mole . K, the final temperature will be (A) 35 K (B) 174 K (C) 274 K (D) 154 K
Last Answer : (C) 274 K
Description : Why can't i wear flipflops?
Last Answer : Hm, what about the ones that have straps on the back of your ankles?
Description : What are the Applications of flipflops?
Last Answer : Need answer
Description : Izzard formula for the time of concentration in minutes for the plots having no channels, is (where Lo is the length of overland flow in metres and Kp rainfall intensity in cm/hour) (A) T = 111 b. L0 1/3/(Kp)2/3 (B) T = 222 b. L0 1/2/(Kp)1/3 (C) T = 333 b. L0/Kp (D) T = 111 b. L0 1/3/(Kp)2/5
Last Answer : Answer: Option A
Description : What is Race Around Condition in a JK FlipFlop?
Last Answer : Ans-IN J-K FF , The clock time is higher than the output toggling time then for J=1 & K=1 , the output will be changed irrelavent of our input. This condition is known as "RACE AROUND CONDITION"..