A name or number used to identify a storage location devices? a. A byte b. A record c. An address d. All of above

A name or number used to identify a storage location devices? a. A byte
b. A record
c. An address
d. All of above
by

1 Answer

Answer :

c. An address
by

Related questions

A name or number used to identify a storage location is called a. A byte b. A record c. An address d. All of above

Description : A name or number used to identify a storage location is called a. A byte b. A record c. An address d. All of above

Last Answer : c. An address

A name or number used to identify storage location devices? A) A byte B) A record C) An address D) All of above

Description : A name or number used to identify storage location devices? A) A byte B) A record C) An address D) All of above

Last Answer : Answer : C

A name or number used to identify a storage location devices? a. A byte b. A record c. An address d. All of above

Description : A name or number used to identify a storage location devices? a. A byte b. A record c. An address d. All of above

Last Answer : An address

A name or number used to identify a storage location is called A) A byte B) A record C) An address D) All of above

Description : A name or number used to identify a storage location is called A) A byte B) A record C) An address D) All of above

Last Answer : Answer : C

A name or number used to identify a storage location is called a. A byte b. A record c. An address d. All of above

Description : A name or number used to identify a storage location is called a. A byte b. A record c. An address d. All of above

Last Answer : c. An address

A collection of 8 bits is called a. byte b. word c. record

Description : A collection of 8 bits is called a. byte b. word c. record

Last Answer : a. byte

Because we wish to allow each ASCII code to occupy one location in memory, most memories are _____ addressable. a. BYTE b. NIBBLE c. WORD (16 bits) d. DOUBLEWORD (32 bits)

Description : Because we wish to allow each ASCII code to occupy one location in memory, most memories are _____ addressable. a. BYTE b. NIBBLE c. WORD (16 bits) d. DOUBLEWORD (32 bits)

Last Answer : a. BYTE

Before a disk drive can access any sector record, a computer program has to provide the record’s disk address. What information does this address specify? a. Track number b. Sector number c. Surface number d. All of above

Description : Before a disk drive can access any sector record, a computer program has to provide the record’s disk address. What information does this address specify? a. Track number b. Sector number c. Surface number d. All of above

Last Answer : d. All of above

Microprocessor 8085 can address location upto a. 32K b. 128K c. 64K d. 1M

Description : Microprocessor 8085 can address location upto a. 32K b. 128K c. 64K d. 1M

Last Answer : c. 64K

A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored

Description : A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored

Last Answer : a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory.

Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory Address Register b. Memory Data Register c. Instruction Register d. Program Register

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory Address Register b. Memory Data Register c. Instruction Register d. Program Register

Last Answer : d. Program Register

How many address lines are needed to address each memory location in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12

Description : How many address lines are needed to address each memory location in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12

Last Answer : b. 11

Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Last Answer : d. Program counter

Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address register b. Memory data register c. Instruction registers d. Program counter

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address register b. Memory data register c. Instruction registers d. Program counter

Last Answer : c. Instruction registers

Which of the following will happen when data is entered into a memory location? a. It will add to the content of the location b. It will change the address of the memory location c. It will erase the previous content d. It will not be fruitful if there is already some data at the location

Description : Which of the following will happen when data is entered into a memory location? a. It will add to the content of the location b. It will change the address of the memory location c. It will erase the previous content d. It will not be fruitful if there is already some data at the location

Last Answer : c. It will erase the previous content

how many address lines are needed to address each machine location in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12

Description : how many address lines are needed to address each machine location in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12

Last Answer : b. 11

Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Last Answer : d. Program counter

Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address registers b. Memory data registers c. Instruction register d. Program counter

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address registers b. Memory data registers c. Instruction register d. Program counter

Last Answer : c. Instruction register

The lower red curvy arrow show that CPU places the address extracted from the memory location on the_____: a. Address bus b. System bus c. Control bus d. Data bus

Description : The lower red curvy arrow show that CPU places the address extracted from the memory location on the_____: a. Address bus b. System bus c. Control bus d. Data bus

Last Answer : a. Address bus

Each memory location has: a. Address b. Contents c. Both A and B d. None of these

Description : Each memory location has: a. Address b. Contents c. Both A and B d. None of these

Last Answer : c. Both A and B

A type of core store that has a lower access time than the devices used for working store in the same processor is known as a. Core memory b. Buffer c. Fast core d. Address register

Description : A type of core store that has a lower access time than the devices used for working store in the same processor is known as a. Core memory b. Buffer c. Fast core d. Address register

Last Answer : d. Address register

8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH 17. If the __ pin is ___ , then we have the option of using the ____ ROM or EPROM together with _____ memory and devices. a) EA, high, internal, external b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal

Description : 8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH 17. If the __ pin is ___ , then we have the option ... b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal

Last Answer : c) EA, high, external, internal

A storage device whe3re the access time is depended upon the location of the data is a. Random access b. Serial access c. Sequential access d. Transaction access

Description : A storage device whe3re the access time is depended upon the location of the data is a. Random access b. Serial access c. Sequential access d. Transaction access

Last Answer : b. Serial access

Which register is a temporary storage location: a. general purpose register b. dedicated register c. A and B d. none of these

Description : Which register is a temporary storage location: a. general purpose register b. dedicated register c. A and B d. none of these

Last Answer : c. A and B

Which of the following items are examples of storage devices? a. Floppy / hard disks b. CD-ROMs c. Tape devices d. All of the above

Description : Which of the following items are examples of storage devices? a. Floppy / hard disks b. CD-ROMs c. Tape devices d. All of the above

Last Answer : d. All of the above

One of a class of storage device devices that can access storage locations in any order is a. DTE b. DASD c. DDE d. DDE

Description : One of a class of storage device devices that can access storage locations in any order is a. DTE b. DASD c. DDE d. DDE

Last Answer : b. DASD

The secondary storage devices can only store data but they cannot perform a. Arithmetic Operation b. Logic operation c. Fetch operations d. Either of the above

Description : The secondary storage devices can only store data but they cannot perform a. Arithmetic Operation b. Logic operation c. Fetch operations d. Either of the above

Last Answer : d. Either of the above

The number of characters that can be stored in given physical space is a. Word length b. Byte c. Data density d. Field

Description : The number of characters that can be stored in given physical space is a. Word length b. Byte c. Data density d. Field

Last Answer : c. Data density

A storage area used to store data to a compensate for the difference in speed at which the different units can handle data is a. Memory b. Buffer c. Accumulator d. Address

Description : A storage area used to store data to a compensate for the difference in speed at which the different units can handle data is a. Memory b. Buffer c. Accumulator d. Address

Last Answer : b. Buffer

Steps involved to fetch a byte in 8085

Description : Steps involved to fetch a byte in 8085

Last Answer : i. The PC places the 16-bit memory address on the address bus ii. The control unit sends the control signal RD to enable the memory chip iii. The byte from ... byte is placed in the instruction decoder of the microprocessor and the task is carried out according to the instruction

The original ASCII code used…bits of each byte, reserving that last bit for error checking a. 5 b. 6 c. 7 d. 8

Description : The original ASCII code used…bits of each byte, reserving that last bit for error checking a. 5 b. 6 c. 7 d. 8

Last Answer : c. 7

A 32 bit microprocessor has the word length equal to a. 2 byte b. 32 byte c. 4 byte d. 8 byte

Description : A 32 bit microprocessor has the word length equal to a. 2 byte b. 32 byte c. 4 byte d. 8 byte

Last Answer : c. 4 byte

A byte consists of a. One bit b. Four bits c. Eight bits d. Sixteen bits

Description : A byte consists of a. One bit b. Four bits c. Eight bits d. Sixteen bits

Last Answer : c. Eight bits

Which of the following magazines covers only the IBM PC and its compatibles? a. Byte b. PC Magazine c. Personal Computing d. Interface Age

Description : Which of the following magazines covers only the IBM PC and its compatibles? a. Byte b. PC Magazine c. Personal Computing d. Interface Age

Last Answer : b. PC Magazine

____is used to control the cache with two new control bits not present in the 80386 microprocessor. What are the bits used to control the 8K byte cache? a) CR0, CD, NW b) CR0, NW, PWT c) Control Register Zero, PWT, PCD d) none

Description : ____is used to control the cache with two new control bits not present in the 80386 microprocessor. What are the bits used to control the 8K byte cache? a) CR0, CD, NW b) CR0, NW, PWT c) Control Register Zero, PWT, PCD d) none

Last Answer : d) none

SP of 8051 is of ___ wide and it is loaded with the default value of ___ after reset. a) 2 byte, 08H b) 8 bit, 07H c) 1 byte, 09H d) 8 bit, 06H

Description : SP of 8051 is of ___ wide and it is loaded with the default value of ___ after reset. a) 2 byte, 08H b) 8 bit, 07H c) 1 byte, 09H d) 8 bit, 06H

Last Answer : d) 8 bit, 06H

8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, register to register c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register

Description : 8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, register ... c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register

Last Answer : c) 232 byte, five 8bit, register to register

The SP is of ___ wide register. And this may be defined anywhere in the ______. a) 8 byte, on-chip 128 byte RAM. b) 8 bit, on chip 256 byte RAM. c) 16 bit,

Description : The SP is of ___ wide register. And this may be defined anywhere in the ______. a) 8 byte, on-chip 128 byte RAM. b) 8 bit, on chip 256 byte RAM. c) 16 bit,

Last Answer : a) 8 byte, on-chip 128 byte RAM.

The 8051 microcontroller is of ___pin package as a ______ processor. a) 30, 1byte b) 20, 1 byte c) 40, 8 bit

Description : The 8051 microcontroller is of ___pin package as a ______ processor. a) 30, 1byte b) 20, 1 byte c) 40, 8 bit

Last Answer : c) 40, 8 bit

The coprocessors operate in ______ with a processor on the same buses and with the same instruction _______. a) Parallel, byte stream. b) Series, byte stream. c) Series, bite stream d) Parallel, bite stream.

Description : The coprocessors operate in ______ with a processor on the same buses and with the same instruction _______. a) Parallel, byte stream. b) Series, byte stream. c) Series, bite stream d) Parallel, bite stream.

Last Answer : a) Parallel, byte stream.

In 8279, the keyboard entries are debounced and stored in an _________, that is further accessed by the CPU to read the key codes. a) 8-bit FIFO b) 8-byte FIFO c) 16 byte FIFO d) 16 bit FIFO

Description : In 8279, the keyboard entries are debounced and stored in an _________, that is further accessed by the CPU to read the key codes. a) 8-bit FIFO b) 8-byte FIFO c) 16 byte FIFO d) 16 bit FIFO

Last Answer : b) 8-byte FIFO

In 8279 Strobed input mode, the control line goes low. The data on return lines is strobed in the ____. a) FIFO byte by byte b) FILO byte by byte c) LIFO byte by byte d) LILO byte by byte.

Description : In 8279 Strobed input mode, the control line goes low. The data on return lines is strobed in the ____. a) FIFO byte by byte b) FILO byte by byte c) LIFO byte by byte d) LILO byte by byte.

Last Answer : a) FIFO byte by byte

8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, register to register c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register

Description : 8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, ... c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register

Last Answer : d) 232 byte, six 8 bit, register to register

ROM d) 8 bit, on chip 128 byte RAM. 3. After reset, SP register is initialized to address________. a) 8H b) 9H c) 7H d) 6H

Description : ROM d) 8 bit, on chip 128 byte RAM. 3. After reset, SP register is initialized to address________. a) 8H b) 9H c) 7H d) 6H

Last Answer : c) 7H

The 8051 microcontroller is of ___pin package as a ______ processor. a) 30, 1byte b) 20, 1 byte c) 40, 8 bit d) 40, 8 byte

Description : The 8051 microcontroller is of ___pin package as a ______ processor. a) 30, 1byte b) 20, 1 byte c) 40, 8 bit d) 40, 8 byte

Last Answer : c) 40, 8 bit

.In an 8085 based system, the maximum number of input output devices can be connectedusing I/0 mapped I/O method isa) 64 b) 512 c) 256 d) 65536

Description : .In an 8085 based system, the maximum number of input output devices can be connectedusing I/0 mapped I/O method isa) 64 b) 512 c) 256 d) 65536

Last Answer : b) 512

The ascending order or a data Hierarchy is a. bit - bytes - fields - record - file - database b. bit - bytes - record - field - file - database c. bytes - bit- field - record - file - database d. bytes -bit - record - field - file - database

Description : The ascending order or a data Hierarchy is a. bit - bytes - fields - record - file - database b. bit - bytes - record - field - file - database c. bytes - bit- field - record - file - database d. bytes -bit - record - field - file - database

Last Answer : a. bit - bytes - fields - record - file - database

The two basic types of record-access methods are a. Sequential and random b. Sequential and indexed c. Direct and immediate d. On-line and real time

Description : The two basic types of record-access methods are a. Sequential and random b. Sequential and indexed c. Direct and immediate d. On-line and real time

Last Answer : a. Sequential and random

What is the location value of R0 and the content at that place? a) 45H, 4F b) 50H, 30H c) 30H, 50H d) 50H, 45H

Description : What is the location value of R0 and the content at that place? a) 45H, 4F b) 50H, 30H c) 30H, 50H d) 50H, 45H

Last Answer : c) 30H,