Description : DeMorgan’s first theorem shows the equivalence of (A) OR gate and Exclusive OR gate. (B) NOR gate and Bubbled AND gate. (C) NOR gate and NAND gate. (D) NAND gate and NOT gate
Last Answer : (B) NOR gate and Bubbled AND gate.
Description : use demorgan's theorem to simplify the following expressions : (bd')(a'+c'd)+(bc'+d'a) -Technology
Last Answer : This answer was deleted by our moderators...
Description : Which of the following pair of gates can form a latch? a. a pair of cross coupled OR b. a pair of cross copled AND c. a pair of cross coupled NAND d. a cross coupled NAND/OR
Last Answer : c. a pair of cross coupled NAND
Description : Of the following circuits, the one which involves storage is a. RS Latch b. mux c. nand d. decoder
Last Answer : a. RS Latch
Description : Why NAND and NOR gate are called as universal gate? Draw AND gate using NAND gate only.
Last Answer : Universal gate - All basic gates functionality can be implemented using NAND and NOR gate hence these gates are called as universal gates. AND gate using NAND gate
Description : Using demorgan's theorems simplify f'=b'd(A'+c'd)+(bc'+d'a) -Technology
Description : State Demorgan's theorem's and prove both theorems using truth table.
Last Answer : De Morgan's 1st theorem states that when the OR sum of two variables is inverted, this is the same as inverting each variable individually and then ANDing these inverted variables. De Morgan's 2nd ... individually and then ORing them. In Boolean equation form it can be written as
Description : Why are NAND and NOR gates called digital building blocks?
Last Answer : NAND and NOR gates are called digital building blocks because they are fundamental building blocks for digital circuits. Both NAND and NOR gates are basic logic gates that can be used to construct ... construct any other logic gates and they can be combined and used to create more complex circuits.
Description : What type of logic circuit is indicated by the truth table shown in the illustration? EL-0072 A. OR B. AND C. NOR D. NAND
Last Answer : Answer: A
Description : In a logic circuit the NOR and NAND gate functions ____________. A. must be accomplished with a common base transistor arrangement B. are available in diode form C. are exact opposites with the ... . have output conditions that are exact opposites to the output condition for OR and AND, respectively
Last Answer : Answer: D
Description : Which of the listed logic gates is considered to be a BASIC building block (basic logic gate) used in logic diagrams? A. NAND B. OR C. NOR D. All of the above.
Last Answer : Answer: B
Description : Which one is faster between NAND-SR FF and NOR-SR FF?
Last Answer : Ans-well both deals with same principle.but i think NAND-SR FF is faster than NOR-SR FF
Description : i. (X’+Y’) A. Low-pass filter function ii. (X’Y’) B. Sum iii. (XY) C. NAND D. Carry E.NOR a) i-C, ii-E, iii-D b) i-C, ii-E, iii-B c) i-C, ii-B, iii-D d) i-C, ii-E, iii-A
Last Answer : Ans: i-C, ii-E, iii-D
Description : Which of following are known as universal gates (A) NAND & NOR. (B) AND & OR. (C) XOR & OR. (D) None.
Last Answer : Ans: A NAND & NOR are known as universal gates, because any digital circuit can be realized completely by using either of these two gates.
Description : The gates required to build a half adder are (A) EX-OR gate and NOR gate (B) EX-OR gate and OR gate (C) EX-OR gate and AND gate (D) Four NAND gates.
Last Answer : (C) EX-OR gate and AND gate
Description : The output of a logic gate is 1 when all its inputs are at logic 0. the gate is either (A) a NAND or an EX-OR (B) an OR or an EX-NOR (C) an AND or an EX-OR (D) a NOR or an EX-NOR
Last Answer : (D) a NOR or an EX-NOR
Description : Which of the following logic operations is performed by the following given combinational circuit ? (A) EXCLUSIVE-OR (B) EXCLUSIVE-NOR (C) NAND (D) NOR
Last Answer : (A) EXCLUSIVE-OR
Description : Sketch symbol of NAND gate and NOR gate.
Last Answer : Symbol of NAND gate and NOR gate
Description : A technique used by codes to convert an analog signal into a digital bit stream is known as a. Pulse code modulation b. Pulse stretcher c. Query processing d. Queue management
Last Answer : a. Pulse code modulation
Description : List the four instructions which control the interrupt structure of the 8085 microprocessor.
Last Answer : • DI ( Disable Interrupts ) • EI ( Enable Interrupts ) • RIM ( Read Interrupt Masks ) • SIM ( Set Interrupt Masks )
Description : A structure that stores a number of bits taken "together as a unit" is a a. gate b. mux c. decoder d. register
Last Answer : d. register
Description : A 32-bit address bus allows access to a memory of capacity(a) 64 Mb (b) 16 Mb (c) 1Gb (d) 4 Gb 2.Which processor structure is pipelined? a) all x80 processors b) all x85 processors c) all x86 processors
Last Answer : c) all x86 processors
Description : The structure of the stack is _______ type structure: a. First in last out b. Last in last out c. Both a & b d. None of these
Last Answer : a. First in last out
Description : Which processor structure is pipelined? a) all x80 processors b) all x85 processors c) all x86 processors
Description : Which of the following theorem convert line integral to surface integral? a) Gauss divergence and Stoke’s theorem b) Stoke’s theorem only c) Green’ s theorem only d) Stoke’s and Green’s theorem
Last Answer : d) Stoke’s and Green’s theorem
Description : We say that a set of gates is logically complete if we can build any circuit without using any other kind of gates. Which of the following sets are logically complete a. set of {AND,OR} b. set of {EXOR, NOT} c. set of {AND,OR,NOT} d. None of the above
Last Answer : c. set of {AND,OR,NOT}
Description : 8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH 17. If the __ pin is ___ , then we have the option ... b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal
Last Answer : c) EA, high, external, internal
Description : If the __ pin is ___ , then we have the option of using the ____ ROM or EPROM together with _____ memory and devices. a) EA, high, internal, external b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal
Last Answer : a) EA, high, internal, external
Description : River Alaknanda forms confluences (Prayags) in Uttrakhand. Match the codes given in Figure with Table (Prayags) and select the correct answer using the code given below. Figure Table (Pr ayags) D A L A K N A N D A C B A I. Karn Prayag II. Rudra Prayag III. Nand Prayag IV. Vishnu Prayag
Last Answer : (1) A-II, B-I, C-III, D-IV
Description : Which of the following statements on DRAM are correct? i) Page mode read operation is faster than RAS read. ii) RAS input remains active during column address strobe. iii) The row and column addresses are strobed into the ... RAS and CAS inputs respectively. a) i & iii b) i & ii c) all d) iii
Last Answer : d) iii
Description : They were fabricated using a low power version of the HMOS technology called____: a. HSMOS b. HCMOS c. HSSOM d. None of these
Last Answer : b. HCMOS
Description : Microprocessor is fabricated on single chip using: a. MOS b. ALU c. CPU d. All of these
Last Answer : a. MOS
Description : Who built the world’s first electronic calculator using telephone relays, light bulbs and batteries/ a. Claude Shannon b. Konrard Zues c. George Stibits d. Howard H. Aiken
Last Answer : c. George Stibits
Description : who is credited with the idea of using punch cards to control patterns of a weaving machine? a. Pascal b. Hollerith c. Babbage d. Jacquard
Last Answer : d. Jacquard
Description : which chips using special external equipment can reprogram a. ROM b. PROM c. SAM d. RAM
Last Answer : b. PROM
Description : A characteristic of card systems is: a. Slowness in processing data b. Using cards as records of transactions c. Needing a larger DP staff d. All of the above
Last Answer : d. All of the above
Description : Who is credited with the idea of using punch cards to control patterns in a waving machine? a. Pascal b. Hollerith c. Babbage d. Jacquard
Description : The microcomputer system by using the ____device interface: a. Input b. Output c. Both A and B d. None of these
Last Answer : c. Both A and B
Description : Which RAM is created using MOS transistors: a. Dynamic RAM b. Static RAM c. Permanent RAM
Last Answer : a. Dynamic RAM
Description : The ram which is created using bipolar transistors is called: a. Dynamic RAM b. Static RAM c. Permanent RAM d. DDR RAM
Last Answer : b. Static RAM
Description : Using 12 binary digits how many unique house addresses would be possible: a. 28=256 b. 212=4096 c. 216=65536 d. None of these
Last Answer : b. 212=4096
Description : CPU can read & write data by using : a. Control bus b. Data bus c. Address bus d. None of these
Last Answer : b. Data bus
Description : The external system bus architecture is created using from ______ architecture: a. Pascal b. Dennis Ritchie c. Charles Babbage d. Von Neumann
Last Answer : d. Von Neumann
Description : The CU is designed by using which techniques: a. HARDWIRED CONTROLS b. MICROPROGRAMING c. NANOPROGRAMING d. ALL OF THESE
Last Answer : d. ALL OF THESE
Description : The processor uses the stack to keep track of where the items are stored on it this by using the: a. Stack pointer register b. Queue pointer register c. Both a & b d. None of these
Last Answer : a. Stack pointer register
Description : Which technology using the microprocessor is fabricated on a single chip: a. POS b. MOS c. ALU d. ABM
Last Answer : b. MOS
Description : Virtual Mode Flag bit can be set using ____ instruction or any task switch operation only in the _____ mode a) IRET, Virtual b) POPF, Real c) IRET, protected d) POPF, protected
Last Answer : b) POPF, Real
Description : Which of the following is not a program linking directive i) EXTRN ii) SEGMENT iii) NAME iv) PUBLIC v) USING a) iv, v b) ii, iii c) i, iii d) ii, v
Last Answer : c) i, iii
Description : The Castigliano's second theorem can be used to compute deflections (A) In statically determinate structures only (B) For any type of structure (C) At the point under the load only (D) For beams and frames only
Last Answer : (B) For any type of structure
Description : Why do we use XRA A instruction
Last Answer : The XRA A instruction is used to clear the contents of the Accumulator and store the value 00H.