Who is the represents the fundamental process in the operation of the CPU: a. The fetch-execute cycle and pipelining b. The assembly c. Both A and B d. None of these

Who is the represents the fundamental process in the operation of the CPU:
a. The fetch-execute cycle and pipelining
b. The assembly
c. Both A and B
d. None of these
by

1 Answer

Answer :

a. The fetch-execute cycle and pipelining
by

Related questions

How can we make computers work faster? a. The fetch-execute cycle and pipelining b. The assembly c. Both A and B d. None of these

Description : How can we make computers work faster? a. The fetch-execute cycle and pipelining b. The assembly c. Both A and B d. None of these

Last Answer : a. The fetch-execute cycle and pipelining

The fetch-execute cycle is to use a system know as: a. Assembly line b. Pipelining c. Cache d. None of these

Description : The fetch-execute cycle is to use a system know as: a. Assembly line b. Pipelining c. Cache d. None of these

Last Answer : b. Pipelining

The necessary steps carried out to perform the operation of accessing either memory or I/O Device, constitute a ___________________ a) fetch operation b) execute operation c) machine cycle

Description : The necessary steps carried out to perform the operation of accessing either memory or I/O Device, constitute a ___________________ a) fetch operation b) execute operation c) machine cycle

Last Answer : c) machine cycle

__is the sequence of operations performed by CPU in processing an instruction: a. Execute cycle b. Fetch cycle c. Decode d. Instruction cycle

Description : __is the sequence of operations performed by CPU in processing an instruction: a. Execute cycle b. Fetch cycle c. Decode d. Instruction cycle

Last Answer : d. Instruction cycle

Which cycle refers to the time period during which one instruction is fetched and executed by the CPU: a. Fetch cycle b. Instruction cycle c. Decode cycle d. Execute cycle

Description : Which cycle refers to the time period during which one instruction is fetched and executed by the CPU: a. Fetch cycle b. Instruction cycle c. Decode cycle d. Execute cycle

Last Answer : b. Instruction cycle

Pipeline implement a. fetch instruction b. decode instruction c. fetch operand d. calculate operand e. execute instruction f. all of abve

Description : Pipeline implement a. fetch instruction b. decode instruction c. fetch operand d. calculate operand e. execute instruction f. all of abve

Last Answer : f. all of abve

The ____ of can assembly line to be I/t p: a. Clock period b. Pipelining c. Throughput d. Flow through

Description : The ____ of can assembly line to be I/t p: a. Clock period b. Pipelining c. Throughput d. Flow through

Last Answer : c. Throughput

The act of acquiring an instruction is referred as the____ the instruction: a. Fetching b. Fetch cycle c. Both a and b d. None of these

Description : The act of acquiring an instruction is referred as the____ the instruction: a. Fetching b. Fetch cycle c. Both a and b d. None of these

Last Answer : a. Fetching

The secondary storage devices can only store data but they cannot perform a. Arithmetic Operation b. Logic operation c. Fetch operations d. Either of the above

Description : The secondary storage devices can only store data but they cannot perform a. Arithmetic Operation b. Logic operation c. Fetch operations d. Either of the above

Last Answer : d. Either of the above

In 8085 microprocessor, how many T-states does OPCODE FETCH machine cycle normally require

Description : In 8085 microprocessor, how many T-states does OPCODE FETCH machine cycle normally require (i.e., when HOLD and WAIT signals are NOT forced)? A) 4 to 6 B) 3 to 8 C) 2 to 3 D) 8 to 12 

Last Answer : In 8085 microprocessor, how many T-states does OPCODE FETCH machine cycle normally require (i.e., when HOLD and WAIT signals are NOT forced)? A) 4 to 6 B) 3 to 8 C) 2 to 3 D) 8 to 12 

How do the contents of the MAR and MDR registers changes during the fetch decode execute cycle?

Description : How do the contents of the MAR and MDR registers changes during the fetch decode execute cycle?

Last Answer : Need answer

A microporgram is sequencer perform the operation a. read b. write c. execute d. read and write e. read and execute

Description : A microporgram is sequencer perform the operation a. read b. write c. execute d. read and write e. read and execute

Last Answer : e. read and execute

Pipelining strategy is called implement a. instruction execution b. instruction prefetch c. instruction decoding d. instruction manipulation

Description : Pipelining strategy is called implement a. instruction execution b. instruction prefetch c. instruction decoding d. instruction manipulation

Last Answer : b. instruction prefetch

In 8086 microprocessor one of the following statements is not true.a)Coprocessor is interfaced in MAX mode b)Coprocessor is interfaced in MIN mode c)I/O can be interfaced in MAX / MIN moded)Supports pipelining

Description : In 8086 microprocessor one of the following statements is not true.a)Coprocessor is interfaced in MAX mode b)Coprocessor is interfaced in MIN mode c)I/O can be interfaced in MAX / MIN moded)Supports pipelining

Last Answer : b)Coprocessor is interfaced in MIN mode

If ______input pin of 80386 if activated, allows address pipelining during 80386 bus cycles. a) BS16 b) NA c) PEREQ d) ADS

Description : If ______input pin of 80386 if activated, allows address pipelining during 80386 bus cycles. a) BS16 b) NA c) PEREQ d) ADS

Last Answer : a) BS16

Define pipelining.

Description : Define pipelining.

Last Answer : Pipelining: Process of fetching the next instruction while the current instruction is executing is called pipelining which will reduce the execution time.

The CPU removes the ___ signal to complete the memory write operation: a. Read b. Write c. Both A and B d. None of these

Description : The CPU removes the ___ signal to complete the memory write operation: a. Read b. Write c. Both A and B d. None of these

Last Answer : a. Read

A CPU handles interrupt by executing interrupt service subroutine................. (A) by checking interrupt register after execution of each instruction (B) by checking interrupt register at the end of the fetch cycle (C) whenever an interrupt is registered (D) by checking interrupt register at regular time interval

Description : A CPU handles interrupt by executing interrupt service subroutine................. (A) by checking interrupt register after execution of each instruction (B) by checking interrupt register ... cycle (C) whenever an interrupt is registered (D) by checking interrupt register at regular time interval

Last Answer : (A) by checking interrupt register after execution of each instruction

CPU does not perform the operation a. data transfer b. logic operation c. arithmetic operation d. all of above

Description : CPU does not perform the operation a. data transfer b. logic operation c. arithmetic operation d. all of above

Last Answer : b. logic operation

The use of spooler programs and/or …. Hardware allows personal computer operators to do the processing work at the same time a printing operation is in progress a. Registered mails b. Memory c. CPU d. Buffer

Description : The use of spooler programs and/or …. Hardware allows personal computer operators to do the processing work at the same time a printing operation is in progress a. Registered mails b. Memory c. CPU d. Buffer

Last Answer : d. Buffer

Steps involved to fetch a byte in 8085

Description : Steps involved to fetch a byte in 8085

Last Answer : i. The PC places the 16-bit memory address on the address bus ii. The control unit sends the control signal RD to enable the memory chip iii. The byte from ... byte is placed in the instruction decoder of the microprocessor and the task is carried out according to the instruction

To locate a data item for storage is a. Field b. Feed c. Database d. Fetch

Description : To locate a data item for storage is a. Field b. Feed c. Database d. Fetch

Last Answer : d. Fetch

_is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these

Description : _is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these

Last Answer : b. Fetch

A computer executes programs in the sequence of : (1) Execute, Fetch, Decode (2) Store, Fetch, Execute (3) Fetch, Decode, Execute (4) Decode, Fetch, Execute

Description : A computer executes programs in the sequence of : (1) Execute, Fetch, Decode (2) Store, Fetch, Execute (3) Fetch, Decode, Execute (4) Decode, Fetch, Execute

Last Answer : Fetch, Decode, Execute

The language that the computer can understand and execute is called a. Machine language b. Application software c. System program d. All of above

Description : The language that the computer can understand and execute is called a. Machine language b. Application software c. System program d. All of above

Last Answer : a. Machine language

Which process information at a much faster rate than it can retrieve it from memory: a. ALU b. Processor c. Microprocessor d. CPU

Description : Which process information at a much faster rate than it can retrieve it from memory: a. ALU b. Processor c. Microprocessor d. CPU

Last Answer : d. CPU

The value memvar must be transferred to the ___: a. Computer b. CPU c. Both A and B d. None of these

Description : The value memvar must be transferred to the ___: a. Computer b. CPU c. Both A and B d. None of these

Last Answer : b. CPU

The ____ place the data from a register onto the data bus: a. CPU b. ALU c. Both A and B d. None of these

Description : The ____ place the data from a register onto the data bus: a. CPU b. ALU c. Both A and B d. None of these

Last Answer : a. CPU

The CPU sends out a ____ signal to indicate that valid data is available on the data bus: a. Read b. Write c. Both A and B

Description : The CPU sends out a ____ signal to indicate that valid data is available on the data bus: a. Read b. Write c. Both A and B

Last Answer : b. Write

The information is transferred from the_____ and ____ specified register: a. MDR b. CPU c. Both A and B

Description : The information is transferred from the_____ and ____ specified register: a. MDR b. CPU c. Both A and B

Last Answer : c. Both A and B

The upper red arrow show that CPU sends out the control signals____ and _____ indicate the data is read from the memory: a. Memory request b. Read c. Both A and B d. None of these

Description : The upper red arrow show that CPU sends out the control signals____ and _____ indicate the data is read from the memory: a. Memory request b. Read c. Both A and B d. None of these

Last Answer : c. Both A and B

Where does the CPU fetch instructions?

Description : Where does the CPU fetch instructions?

Last Answer : Need answer

Ti is the time taken for the ith stage and there are n stages in the: a. Throughput b. Assembly line c. Both A and B d. None of these

Description : Ti is the time taken for the ith stage and there are n stages in the: a. Throughput b. Assembly line c. Both A and B d. None of these

Last Answer : b. Assembly line

Which of the following is called low level languages? a. Machine language b. Assembly language c. Both of the above d. None of above

Description : Which of the following is called low level languages? a. Machine language b. Assembly language c. Both of the above d. None of above

Last Answer : c. Both of the above

PC’s use____ based on this architecture: a. CPU b. ALU c. MU

Description : PC’s use____ based on this architecture: a. CPU b. ALU c. MU

Last Answer : a. CPU

A computer which has the microprocessor as______ is called as a microcomputer: a. CPU b. ALU c. RU

Description : A computer which has the microprocessor as______ is called as a microcomputer: a. CPU b. ALU c. RU

Last Answer : a. CPU

Microprocessor is fabricated on single chip using: a. MOS b. ALU c. CPU d. All of these

Description : Microprocessor is fabricated on single chip using: a. MOS b. ALU c. CPU d. All of these

Last Answer : a. MOS

Which is the components of computer: a. System Bus b. CPU c. Memory Unit d. All of these

Description : Which is the components of computer: a. System Bus b. CPU c. Memory Unit d. All of these

Last Answer : d. All of these

In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack

Description : In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack

Last Answer : b. after OP code in the instruction

The most common addressing techiniques employed by a CPU is a. immediate b. direct c. indirect d. register e. all of the above

Description : The most common addressing techiniques employed by a CPU is a. immediate b. direct c. indirect d. register e. all of the above

Last Answer : e. all of the above

What is the control unit's function in the CPU? a. To transfer data to primary storage b. to store program instruction c. to perform logic operations d. to decode program instruction

Description : What is the control unit's function in the CPU? a. To transfer data to primary storage b. to store program instruction c. to perform logic operations d. to decode program instruction

Last Answer : b. to store program instruction

Where does a computer add and compare data? a. Hard disk b. Floppy disk c. CPU chip d. Memory chip

Description : Where does a computer add and compare data? a. Hard disk b. Floppy disk c. CPU chip d. Memory chip

Last Answer : c. CPU chip

The ________ ensures that only one IC is active at a time to avoid a bus conflict caused by two ICs writing different data to the same bus.A.control busB.control instructionsC. address decoder D.CPU

Description : The ________ ensures that only one IC is active at a time to avoid a bus conflict caused by two ICs writing different data to the same bus.A.control busB.control instructionsC. address decoder D.CPU

Last Answer : C. address decoder

Offline device is a. A device which is not connected to CPU b. A device which is connected to CPU c. A direct access storage device d. An I/O device

Description : Offline device is a. A device which is not connected to CPU b. A device which is connected to CPU c. A direct access storage device d. An I/O device

Last Answer : a. A device which is not connected to CPU

Which computer memory is used for storing programs and data currently being processed by the CPU? a. Mass memory b. Internal memory c. Non-volatile memory d. PROM

Description : Which computer memory is used for storing programs and data currently being processed by the CPU? a. Mass memory b. Internal memory c. Non-volatile memory d. PROM

Last Answer : b. Internal memory

What type of memory is not directly addressable by the CPU and requires special softw3are called EMS (expanded memory specification)? a. Extended b. Expanded c. Base d. Conventional

Description : What type of memory is not directly addressable by the CPU and requires special softw3are called EMS (expanded memory specification)? a. Extended b. Expanded c. Base d. Conventional

Last Answer : b. Expanded

The brain of any computer system is a. ALU b. Memory c. CPU d. Control unit

Description : The brain of any computer system is a. ALU b. Memory c. CPU d. Control unit

Last Answer : c. CPU

Which is an item of storage medium in the form of circular plate? a. Disk b. CPU c. Printer d. ALU

Description : Which is an item of storage medium in the form of circular plate? a. Disk b. CPU c. Printer d. ALU

Last Answer : a. Disk

. An online backing storage system capable of storing larger quantities of data is a. CPU b. Memory c. Mass storage d. Secondary storage

Description : . An online backing storage system capable of storing larger quantities of data is a. CPU b. Memory c. Mass storage d. Secondary storage

Last Answer : c. Mass storage

Interface electronic circuit is used to interconnect I/O devices to a computer’s CPU or a. ALU b. Memory c. Buffer d. Register

Description : Interface electronic circuit is used to interconnect I/O devices to a computer’s CPU or a. ALU b. Memory c. Buffer d. Register

Last Answer : b. Memory