Description : The time taken for all stages of the assembly line to become active is called the: a. Flow through time b. Clock period c. Throughput d. All of these
Last Answer : a. Flow through time
Description : Who is the determined by the time taken by the stages the requires the most processing time: a. Clock period b. Flow through c. Throughput d. None of these
Last Answer : a. Clock period
Description : The fetch-execute cycle is to use a system know as: a. Assembly line b. Pipelining c. Cache d. None of these
Last Answer : b. Pipelining
Description : Ti is the time taken for the ith stage and there are n stages in the: a. Throughput b. Assembly line c. Both A and B d. None of these
Last Answer : b. Assembly line
Description : Who is the represents the fundamental process in the operation of the CPU: a. The fetch-execute cycle and pipelining b. The assembly c. Both A and B d. None of these
Last Answer : a. The fetch-execute cycle and pipelining
Description : How can we make computers work faster? a. The fetch-execute cycle and pipelining b. The assembly c. Both A and B d. None of these
Description : The clock period is denoted by: a. T p b. T1+T2+T3-------+T n c. Pt d. None of these
Last Answer : a. T p
Description : Pipelining strategy is called implement a. instruction execution b. instruction prefetch c. instruction decoding d. instruction manipulation
Last Answer : b. instruction prefetch
Description : In 8086 microprocessor one of the following statements is not true.a)Coprocessor is interfaced in MAX mode b)Coprocessor is interfaced in MIN mode c)I/O can be interfaced in MAX / MIN moded)Supports pipelining
Last Answer : b)Coprocessor is interfaced in MIN mode
Description : If ______input pin of 80386 if activated, allows address pipelining during 80386 bus cycles. a) BS16 b) NA c) PEREQ d) ADS
Last Answer : a) BS16
Description : Define pipelining.
Last Answer : Pipelining: Process of fetching the next instruction while the current instruction is executing is called pipelining which will reduce the execution time.
Description : What is the maximum clock speed of P III processors a. 1.0 GHz b. 1.1 GHz c. 1.2 GHz d. 1.3 GHz
Last Answer : b. 1.1 GHz
Description : Which is most commonly measured in terms of MIPS previously million instruction per second: a. Microprocessor b. Performance of a microprocessor c. Assembly line d. None of thes
Last Answer : b. Performance of a microprocessor
Description : In 8279, a scanned sensor matrix mode, if a sensor changes its state, the ___ line goes ____ to interrupt the CPU. a) CS, high b) A0, high c) IRQ, high d) STB, high
Last Answer : c) IRQ, high
Description : In 8279 Strobed input mode, the control line goes low. The data on return lines is strobed in the ____. a) FIFO byte by byte b) FILO byte by byte c) LIFO byte by byte d) LILO byte by byte.
Last Answer : a) FIFO byte by byte
Description : What is Microprocessor? Give the power supply & clock frequency of 8085
Last Answer : A microprocessor is a multipurpose, programmable logic device that reads binary instructions from a storage device called memory accepts binary data as input and processes data according ... provides result as output. The power supply of 8085 is +5V and clock frequency in 3MHz.
Description : Which is the main feature of 8085: a. Internal clock generator b. Internal system controller c. Higher clock frequency d. All of these
Last Answer : d. All of these
Description : Digital devices are a. Digital Clock b. Automobile speed meter c. Clock with a dial and two hands d. All of them
Last Answer : a. Digital Clock
Description : 8086 microprocessor is interfaced to 8253 a programmable interval timer. The maximum number by which the clock frequency on one of the timers is divided by a) 216 b) 28 c) 210 d) 220
Last Answer : d) 220
Description : What does microprocessor speed depends on? a) Clock b) Data bus width c) Address bus width
Last Answer : c) Address bus width
Description : The clock frequency of an 8085 microprocessor based system is 3 MHz. What should be the minimum pulse width of the INTR signal so that it is recognized successfully? A) 5.6 µs B) 5.7 µs C) 5.8 µs D) 5.9 µs
Last Answer : The clock frequency of an 8085 microprocessor based system is 3 MHz. What should be the minimum pulse width of the INTR signal so that it is recognized successfully? A) 5.6 µs B) 5.7 µs C) 5.8 µs D) 5.9 µs
Description : Each model of a computer has a unique a. Assembly of a computer b. Machine language c. High level language d. All of the above
Last Answer : b. Machine language
Description : A disk storage medium in the form of an assembly containing a single rigid magnetic disk permanently is a. Fixed disk b. Disk cartridge c. Card punch d. Card reader
Last Answer : b. Disk cartridge
Description : Which of the following is machine independence program? a. High level language b. Low level language c. Assembly language d. Machine language
Last Answer : a. High level language
Description : which of the following is problem oriented language? a. High level language b. Machine language c. Assembly language d. Low level language
Description : Which of the following is called low level languages? a. Machine language b. Assembly language c. Both of the above d. None of above
Last Answer : c. Both of the above
Description : Easily reloctable language is a. Machine language b. Assembly language c. High level language d. Medium level language
Last Answer : b. Assembly language
Description : The translator program used in assembly language is called a. Compiler b. Interpreter c. Assembler d. Translator
Last Answer : c. Assembler
Description : Mnemonic a memory trick is used in which of the following language? a. Machine language b. Assembly language c. High level language d. None of abov
Description : Which language is directly understood by the computer without translation program? a. Machine language b. Assembly language c. High level language d. None of above
Last Answer : a. Machine language
Description : What is the output of the following code AL=00110101 BL= 39H M. Krishna Kumar/IISc. Bangalore M2/V1/June 04/1 Microprocessors and Microcontrollers/Assembly language of 8086 Multiple Choice Questions SUB AL, BL AAS ... , CF=1 b) BL=00000100, CF=0 c) AL=11111100 CF=1 d) BL= 00000100, CF=1
Last Answer : b) BL=00000100, CF=0
Description : ____ Was more common year: a. CRT b. TTL c. Both A and B d. None of these
Last Answer : b. TTL
Description : Serial port interrupt is generated, if ____ bits are seta) IE b) RI, IE c) IP, TI d) RI, TI
Last Answer : d) RI, TI
Description : The number of software interrupts in 8085 is ____ a) 5 b) 8
Last Answer : b) 8
Description : The ____ place the data from a register onto the data bus: a. CPU b. ALU c. Both A and B d. None of these
Last Answer : a. CPU
Description : The CPU sends out a ____ signal to indicate that valid data is available on the data bus: a. Read b. Write c. Both A and B
Last Answer : b. Write
Description : The information is transferred from the_____ and ____ specified register: a. MDR b. CPU c. Both A and B
Last Answer : c. Both A and B
Description : In linear decoding address bus of 16-bit wide can connect only ____ of RAM. a. 16 KB b. 6KB c. 12KB d. 64KB
Last Answer : b. 6KB
Description : ____ causes the address of the next microprocessor to be obtained from the memory: a. CRJA b. ROM c. MAP d. HLT
Last Answer : c. MAP
Description : Virtual Mode Flag bit can be set using ____ instruction or any task switch operation only in the _____ mode a) IRET, Virtual b) POPF, Real c) IRET, protected d) POPF, protected
Last Answer : b) POPF, Real
Description : In modes 2 and 3, if _____ bit of SCON bit is set will causes enable multiprocessor communication and is of ____ bit address. a) SM1, 9EH b) TB8 , 9CH c) SM2 , 9DH d) SM0, 9FH
Last Answer : c) SM2 , 9DH
Description : In 8051 an external interrupt 1 vector address is of ________ and causes of interrupt if ____. a) 000BH, a high to low transition on pin INT1 b) 001BH, a low to high transition on pin INT1 c) 0013H, a high to low transition on pin INT1 d) 0023H, a low to high transition on pin INT1
Last Answer : a) 000BH, a high to low transition on pin INT1
Description : In 8096, mode ____ of serial port are ___ modes commonly used for ____ communications. a) 1, 8bit, single processor b) 0, 7bit, multiple microcontroller c) 2, 9 bit, multiple processors d) 3, 8 bit, multiple microcontroller
Last Answer : a) 1, 8bit, single processor
Description : In 8096, CCB bit 3 is ____. a) write strobe mode select b) address valid strobe select c) bus width select d) Internal read control mode
Last Answer : c) bus width select
Description : 8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH 17. If the __ pin is ___ , then we have the option ... b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal
Last Answer : c) EA, high, external, internal
Description : 8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, register ... c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register
Last Answer : c) 232 byte, five 8bit, register to register
Description : Serial port interrupt is generated, if ____ bits are set a) IE b) RI, IE c) IP, TI d) RI, TI
Last Answer : a) IE
Last Answer : c) 2, 9 bit, multiple processors
Last Answer : b) address valid strobe select
Description : If the __ pin is ___ , then we have the option of using the ____ ROM or EPROM together with _____ memory and devices. a) EA, high, internal, external b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal
Last Answer : a) EA, high, internal, external