Description : Which is the most important component of a digit computer that interprets the instruction and processes the data contained in computer programs: MU b. ALU c. CPU d. PC
Last Answer : c. CPU
Description : Modern assemblers for RISC based architectures make optimization of instruction scheduling to make use of CPU __ efficiently: a. Pipeline b. Without pipeline c. Botha &b d. None of these
Last Answer : a. Pipeline
Description : Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these
Last Answer : b. Cache memory
Description : specify where to get the source and destination operands for the operation specified by the a. Operand fields and opcode b. Opcode and operand c. Source and destination d. Cpu and memory
Last Answer : a. Operand fields and opcode
Description : __is the sequence of operations performed by CPU in processing an instruction: a. Execute cycle b. Fetch cycle c. Decode d. Instruction cycle
Last Answer : d. Instruction cycle
Description : sis given an instruction in machine language this instruction is fetched from the memory by the CPU to execute: a. ALU b. CPU c. MU d. All of these
Last Answer : b. CPU
Description : Which cycle refers to the time period during which one instruction is fetched and executed by the CPU: a. Fetch cycle b. Instruction cycle c. Decode cycle d. Execute cycle
Last Answer : b. Instruction cycle
Description : is an external hardware event which causes the CPU to interrupt the current instruction sequence: a. Input interrupt b. Output interrupt c. Both d. None of these
Last Answer : c. Both
Description : Which part work as a the brain of the computer and performs most of the calculation: a. MU b. PC c. ALU d. CPU
Last Answer : d. CPU
Description : In memory transfer location address is supplied by that puts this on address bus. a. ALU b. CPU Cc. MAR d. MDR
Description : Before checking the program for errors in translating code into machine language the high level language code is loaded into __ a. Register b. Memory c. Data d. CPU
Last Answer : b. Memory
Description : Cache memory is located between main memory and : a. CPU b. Memory c. Botha &b d. None of these
Last Answer : a. CPU
Description : ___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory
Last Answer : b. Microprocessor
Description : The extent nesting in subroutine is limited only by: a. Number of available Stack locations b. Number of available Addressing locations c. Number of available CPU locations d. Number of available Memory locations
Last Answer : a. Number of available Stack locations
Description : The function of these microinstructions is to issue the micro orders to_ _ a. CPU b. Memory c. Register d. Accumulator
Description : Control memory is part of __ that has addressable storage registers and used as temporary storage for data. a. ROM b. RAM c. CPU d. Memory
Last Answer : b. RAM
Description : Which memory is used to copy instructions or data currently used by CPU: a. Main memory b. Secondary memory c. Cache memory d. None of these
Last Answer : c. Cache memory
Description : What are 2 advantages of cache memory: a. Reduction of average access time for CPU memory b. Reduction of bandwidth of available memory of CPU c. Botha&b d. None of these
Last Answer : c. Botha&b
Description : Which functions are performed by CU: a. Data exchange b/w CPU and memory or I/O modules b. External operations c. Internal operations inside CPU d Botha&c
Last Answer : d Botha&c
Description : Which are internal operations inside CPU: a. Data transfer b/w registers b. Instructing ALU to operate data c. Regulation of other internal operations d. All of these
Last Answer : d. All of these
Description : ___is the data paths link CPU registers with memory or I/O modules. a. External data paths b. Internal data paths c. Boreal data paths d. Exchange data paths
Last Answer : a. External data paths
Description : function select takes op code in IR translating to function of ALU and it may be compact binary code or one line per ALU: a ALU b CPU c. Memory d. Cache
Last Answer : a ALU
Description : Abus organization for seven __ register: a. ALU b. RISC c. CPU d. MUX
Description : five bits of OPR select one of the operation inthe __ in control register. a. CPU b. RISC ec ALU d. MUX
Last Answer : ec ALU
Description : A stack in a digital computer isa partofthe_ ALU CPU a. b. c. Memory unit d None of these
Last Answer : c. Memory unit
Description : Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU
Last Answer : b. Main memory
Description : Ininstruction formats the information required by the _ for execution: a. ALU b. CPU Cc. RISC d. DATA
Description : Which are contains one or more register that may be referenced by machine instruction: a. Input b. Output c. CPU d. ALU
Description : The instruction set can have variable-length instruction format primarily due to: a. Varying number of operands b. Varying length of opcodes in some CPU ce. Both d. None
Last Answer : ce. Both
Description : is just like a circular array: a. Data b. Register c. ALU d. CPU
Last Answer : b. Register
Description : Which is an important data transfer technique . a. CPU b. DMA Cc. CAD d. None of these
Last Answer : b. DMA
Description : Information is handled in the computer by _ __ a. Electrical digit b. Electrical component c. Electronic bit d. None of these
Last Answer : b. Electrical component
Description : Oand 1 are know as a. Byte b. Bit c. Digits d. Component
Last Answer : b. Bit
Description : How many condition that should be met in order to produce a deadlock. a. 2 b 4 Cc. 6 d 8
Last Answer : b 4
Description : 0,1,2 ,3 ,4,5,6 ,7,8 and 9 numerals are called: a. Arabic numerals b. String numerals c. Digit numerals d. None of these
Last Answer : a. Arabic numerals
Description : How many algorithm based on add/subtract and shift category: a. 2 b 64 ec. 8 d 6
Last Answer : ec. 8
Description : How many bit of exponent: a. 4 b 6 Cc. 8 d. 10
Last Answer : b 6
Description : There are how many register groups in control memory: a 3 b 5 c. 6 d 8
Last Answer : b 5
Description : One last bit of control output is for control of___ state. a. Minor b. Major c. Mixer d. None of these
Last Answer : b. Major
Description : Jump has 3 major states are: a. Fetch b. Decode c. Complete d= Allof these
Last Answer : d= Allof these
Description : state keeps track of position related to execution of an instruction: a. Major b. Minor c. Botha & b d. None of these
Last Answer : a. Major
Description : A binary number with 8 bits is called asa___ a. Bytes b. Bits c. Nibble d. __ Allof these
Last Answer : a. Bytes
Description : How many bits of mantissa : a. 4 b. 8 ec. 10 d. 16
Last Answer : ec. 10
Description : How many types of loop control structures in C language. a. 4 b 65 c. 2 d. 8
Last Answer : d. 8
Description : This component is required to process data into information and consists of integrated circuits. 1) Hard disk 2) RAM 3) CPU 8 4) ROM 5) None of these
Last Answer : Answer :3
Description : How many system of arithmetic, which are often used in digital system. a. 5 b. 6 Cc. 3 d 4
Last Answer : d 4
Description : How many main sign number binary codes are used: a. 4 b 65 ce. 3 d. 6
Last Answer : ce. 3
Description : How many types of addition in the 2’s complement system. a. 3 b 4 c. 5 d. 6
Description : Which microprocessor is available with a clock speed of 1.6 GHZ: a Pentium III b. Pentium II c. Pentium IV d. All of these
Last Answer : c. Pentium IV
Description : How many parts of memory bus: a 2 b 3 c. 5 d. 6
Last Answer : a 2