Description : Which operations are used for addition, subtraction, increment, decrement and complement function: a. Bus b. Memory transfer c. Arithmetic operation d. Allof these
Last Answer : d. Allof these
Description : In which transfer the computer register are indicated in capital letters for depicting its function. a. Memory transfer b. Register transfer c. Bus transfer d. None of these
Last Answer : b. Register transfer
Description : In memory transfer location address is supplied by that puts this on address bus. a. ALU b. CPU Cc. MAR d. MDR
Last Answer : b. CPU
Description : The memory bus is also referred as _ a. Databus b. Address bus c. Memory bus d. — Allof these
Last Answer : a. Databus
Description : Which are the causes of the interrupt: a. In any single device b. In processor poll devices c. In a device whose ID number is stored on the address bus d. Allof these
Description : In every transfer, selection of register by bus is decided by: a. Control signal b No signal c. All signal d. Allof above
Last Answer : a. Control signal
Description : Which is the input of control unit: a. Master clock signal b. Instruction register c. Flags d. Control signals from bus e. Allof these
Last Answer : e. Allof these
Description : How is selects the register that receives the information from the output bus. Decoder Encoder MUX
Last Answer : Decoder
Description : There are how many register groups in control memory: a 3 b 5 c. 6 d 8
Last Answer : b 5
Description : How many parts of floating point representation of a number consists. a. 4 b 2 Cc. 3 d 5
Last Answer : b 2
Description : How many modes the address in control memory are divided. a 2 b 3 c. 5 d 7
Last Answer : a 2
Description : emaphore provides mutual exclusion for accesses to the buffer pool and is initialized to the value: a. Mutex b. Mutual Cc. Memory d. __ Allof these
Last Answer : Mutex
Description : Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these
Last Answer : b. Cache memory
Description : specify where to get the source and destination operands for the operation specified by the a. Operand fields and opcode b. Opcode and operand c. Source and destination d. Cpu and memory
Last Answer : a. Operand fields and opcode
Description : The source/destination of operands can be the_ or one of the general-purpose register: a. Memory b. One c. both d. None of these
Last Answer : a. Memory
Description : _is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these
Last Answer : b. Fetch
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next
Last Answer : c. Instruction register, incremented and next
Description : Which unit acts as the brain of the computer which control other peripherals and interfaces: a. Memory unit b. Cache unit c. Timing and control unit d. None of these
Last Answer : c. Timing and control unit
Description : Which unit works as an interface between the processor and all the memories on chip or off- chip: a. Timing unit b. Control unit c. Memory control unit d All of these
Last Answer : c. Memory control unit
Description : sis given an instruction in machine language this instruction is fetched from the memory by the CPU to execute: a. ALU b. CPU c. MU d. All of these
Description : Which instruction are 32 bits long , with extra 16 bits. a. Memory reference instruction b. Memory reference format c. Both d. None of these
Last Answer : a. Memory reference instruction
Description : Which is addressed by sign extending the 16-bit displacement to 32-bit: a. Memory address b. Effective memory address c. Both a and b d. None of these
Last Answer : b. Effective memory address
Description : Which are instruction in which two machine cycle are required: a. Instruction cycle b. Memory reference instruction c. Both d. None of these
Last Answer : b. Memory reference instruction
Description : Which instruction are used in multithreaded parallel processor architecture. a. Memory reference instruction b. Memory reference format c. Both d. None of these
Description : Which instruction are arranged as per the protocols of memory reference format of the input file in a simple ASCII sequence of integers between the range O to 99 separated by spaces without formatted text ... : a. Memory reference instruction b. Memory reference format c. Both d. None of these
Description : Which are benefit of input/output interrupt: a. It is an external analogy to exceptions b. The processor initiates and perform all I/O operation c. The data is transferred into the memory through interrupt handler d. = Alllof these
Last Answer : d. = Alllof these
Description : of the primary memory of the computer is limited. a. Storage capacity b. Magnetic disk c. Both d. None of these
Last Answer : a. Storage capacity
Description : Which microprocessor has the control unit, memory unit and arithmetic and logic unit: a. Pentium IV processor b Pentium V processor c. Pentium III processor d. None of these
Last Answer : a. Pentium IV processor
Description : The register that includes the address of the memory unit is termed asthe _ a. MAR b PC Cc. IR d. None of these
Last Answer : a. MAR
Description : In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these
Last Answer : ce. MAR
Description : Which operation puts memory address in memory address register and data in DR. a Memory read b. Memory write c Both d. None
Last Answer : b. Memory write
Description : SDRAM stands for. a. System dynamic random access memory b. Synchronous dynamic random access memory c. Both d. None
Last Answer : b. Synchronous dynamic random access memory
Description : END of macro definition by: a. NAME b. MEND c. DATA d. MEMORY
Last Answer : b. MEND
Description : Itis the task of the __to locate externally defined symbols in programs, load them in to memory by placing their __ of symbols in calling program: a. Loader and name b. Linker and values c. Linker and name d. Loader and values
Last Answer : d. Loader and values
Description : Before checking the program for errors in translating code into machine language the high level language code is loaded into __ a. Register b. Memory c. Data d. CPU
Last Answer : b. Memory
Description : Cache memory is located between main memory and : a. CPU b. Memory c. Botha &b d. None of these
Last Answer : a. CPU
Description : ___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory
Last Answer : b. Microprocessor
Description : Call instruction is written inthe ss program. a. Main b. Procedures c. Program d. Memory
Last Answer : a. Main
Description : The extent nesting in subroutine is limited only by: a. Number of available Stack locations b. Number of available Addressing locations c. Number of available CPU locations d. Number of available Memory locations
Last Answer : a. Number of available Stack locations
Description : A flag isa __ __that keep track of a changing condition during computer run: a. Memory b. Register c. Controller d. None of these
Last Answer : d. None of these
Description : The _stack can be 4-word memory addressed by 2 bits from an up/down counter known as the stack pointer: a. FIFO b. PIPO c. SISO d. LIFO
Last Answer : d. LIFO
Description : The micro program is an written in microcode and stored in firmware which is also referred as___ | a. Interpreter and control memory b. Translator and control store c. Translator and control memory d. ‘Interpreter and Translator
Last Answer : a. Interpreter and control memory
Description : program converts machine instructions into control signals. a. Control memory program b. Control store program c Botha&b d. Only memory
Last Answer : c Botha&b
Description : The function of these microinstructions is to issue the micro orders to_ _ a. CPU b. Memory c. Register d. Accumulator
Description : Micro-orders generate the_ __ address of operand and execute instruction and prepare for fetching next instruction from the main memory: a. Physical b. Effective c. Logical d. all of above
Last Answer : b. Effective
Description : Which microinstruction provide next instruction from control memory: a. Microinstruction execution b. Microinstruction Buffer c. Microinstruction decoder d. Microinstraction Sequencing
Last Answer : d. Microinstraction Sequencing
Description : Microcodes are stored as firmware in _ a. Memory chips b. Registers c. accumulators d. none of these
Last Answer : a. Memory chips
Description : Acontrol memory is__ stored in some area of memory: a. Control instraction b. Memory instruction c. Register instruction d. None of these
Last Answer : a. Control instraction
Description : A computer having writable control memory is known as_ a. Static micro programmable b. Dynamic micro programmable c. Botha & b d. None of these
Last Answer : b. Dynamic micro programmable