For the 8-bit word 00111001, the check bits stored with it would be 0111. Suppose when the word is read from memory, the check bits are calculated to be 1101. What is the data word that was read from memory? (A) 10011001 (B) 00011001 (C) 00111000 (D) 11000110

For the 8-bit word 00111001, the check bits stored with it would be 0111. Suppose when the word is read from memory, the check bits are calculated to be 1101. What is the data word that was read from memory? (A) 10011001 (B) 00011001 (C) 00111000 (D) 11000110
by

1 Answer

Answer :

(B) 00011001
by

Related questions

In one's complement arithmetic, if positive 7 is 0111, then negative 7 is ________. A) 1111 B) 1101 C) 1000 D) none of the above

Description : In one's complement arithmetic, if positive 7 is 0111, then negative 7 is ________. A) 1111 B) 1101 C) 1000 D) none of the above

Last Answer : 1101

Suppose a digitized voice channel is made by digitizing 8 kHz bandwidth analog voice signal. It is required to sample the signal at twice the highest frequency (two samples per hertz). What is the bit rate required, if it is assumed that each sample requires 8 bits? (A) 32 kbps (B) 64 kbps (C) 128 kbps (D) 256 kbps

Description : Suppose a digitized voice channel is made by digitizing 8 kHz bandwidth analog voice signal. It is required to sample the signal at twice the highest frequency (two samples per hertz). What is the bit rate required, if it ... sample requires 8 bits? (A) 32 kbps (B) 64 kbps (C) 128 kbps (D) 256 kbps

Last Answer : (C) 128 kbps

1’s complement representation of decimal number of -17 by using 8 bit representation is (A) 1110 1110 (B) 1101 1101 (C) 1100 1100 (D) 0001 0001

Description : 1’s complement representation of decimal number of -17 by using 8 bit representation is (A) 1110 1110 (B) 1101 1101 (C) 1100 1100 (D) 0001 0001

Last Answer : (A) 1110 1110

The number of function points of a proposed system is calculated as 500. Suppose that the system is planned to be developed in Java and the LOC/FP ratio of Java is 50. Estimate the effort (E) required to complete the project using the effort formula of basic COCOMO given below: E = a(KLOC)b Assume that the values of a and b are 2.5 and 1.0 respectively. (A) 25 person months (B) 75 person months (C) 62.5 person months (D) 72.5 person months

Description : The number of function points of a proposed system is calculated as 500. Suppose that the system is planned to be developed in Java and the LOC/FP ratio of Java is 50. Estimate the effort (E) required to ... ) 25 person months (B) 75 person months (C) 62.5 person months (D) 72.5 person months

Last Answer : (C) 62.5 person months 

An analog signal has a bit rate of 6000 bps and a baud rate of 2000 baud. How many data elements are carried by each signal element ? (A) 0.336 bits/baud (B) 3 bits/baud (C) 120,00,000 bits/baud (D) None of the above

Description : An analog signal has a bit rate of 6000 bps and a baud rate of 2000 baud. How many data elements are carried by each signal element ? (A) 0.336 bits/baud (B) 3 bits/baud (C) 120,00,000 bits/baud (D) None of the above

Last Answer : (B) 3 bits/baud

A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored

Description : A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored

Last Answer : a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory.

What is the bit rate for transmitting uncompressed 800x600 pixel colour frames with 8 bits/pixel at 40 frames/second ? (A) 2.4 Mbps (B) 15.36 Mbps (C) 153.6 Mbps (D) 1536 Mbps

Description : What is the bit rate for transmitting uncompressed 800x600 pixel colour frames with 8 bits/pixel at 40 frames/second ? (A) 2.4 Mbps (B) 15.36 Mbps (C) 153.6 Mbps (D) 1536 Mbps 

Last Answer : (C) 153.6 Mbps Explanation: The number of bits/sec is just 800x600x40x8 or 153.6 Mbps.

Assume that we need to download text documents at the rate of 100 pages per minute. A page is an average of 24 lines with 80 characters in each line and each character requires 8 bits. Then the required bit rate of the channel is ................ (A) 1.636 Kbps (B) 1.636 Mbps (C) 2.272 Mbps (D) 3.272 Kbps

Description : Assume that we need to download text documents at the rate of 100 pages per minute. A page is an average of 24 lines with 80 characters in each line and each character requires 8 bits. Then the required bit rate of the channel is ... ...... (A) 1.636 Kbps (B) 1.636 Mbps (C) 2.272 Mbps (D) 3.272 Kbps

Last Answer : Answer: Marks given to all

Images tend to be very large collection of data. The size of memory required for a 1024 by 1024 image in which the colour of each pixel is represented by a n-bit number, (in an 8 bit machines) is (A) n × 8 MB (B) n / 8 MB (C) (1024 × 1024) / 8 MB (D) 1024 MB

Description : Images tend to be very large collection of data. The size of memory required for a 1024 by 1024 image in which the colour of each pixel is represented by a n-bit number, (in an 8 bit machines) is (A) n × 8 MB (B) n / 8 MB (C) (1024 × 1024) / 8 MB (D) 1024 MB

Last Answer : (B) n / 8 MB

Suppose that the time to do a null remote procedure call (RPC) (i.e, 0 data bytes) is 1.0 msec, with an additional 1.5 msec for every 1K of data. How long does it take to read 32 K from the file server as 32 1K RPCs? (A) 49 msec (B) 80 msec (C) 48 msec (D) 100 msec

Description : Suppose that the time to do a null remote procedure call (RPC) (i.e, 0 data bytes) is 1.0 msec, with an additional 1.5 msec for every 1K of data. How long does it take to read 32 K from the file server as 32 1K RPCs? (A) 49 msec (B) 80 msec (C) 48 msec (D) 100 msec

Last Answer : (B) 80 msec

The baud rate of a signal is 600 baud/second. If each signal unit carries 6 bits, then the bit rate of a signal is ................. (A) 3600 (B) 100 (C) 6/600 (D) None of the above

Description : The baud rate of a signal is 600 baud/second. If each signal unit carries 6 bits, then the bit rate of a signal is ................. (A) 3600 (B) 100 (C) 6/600 (D) None of the above

Last Answer : (A) 3600 

An analog signal carries 4 bits in each signal unit. If 1000 signal units are sent per second, then baud rate and bit rate of the signal are ............... and .............. (A) 4000 bauds \ sec & 1000 bps (B) 2000 bauds \ sec & 1000 bps (C) 1000 bauds \ sec & 500 bps (D) 1000 bauds \ sec & 4000 bps

Description : An analog signal carries 4 bits in each signal unit. If 1000 signal units are sent per second, then baud rate and bit rate of the signal are ............... and .............. (A) 4000 bauds \ sec & ... (B) 2000 bauds \ sec & 1000 bps (C) 1000 bauds \ sec & 500 bps (D) 1000 bauds \ sec & 4000 bps

Last Answer : (D) 1000 bauds \ sec & 4000 bps Explanation: Bit rate is the number of bits per second. Baud rate is the number of signal units per second. Baud rate is less than or equal to the bit rate. Baud rate = 1000 bauds per second (baud/s) Bit rate = 1000 x 4 = 4000 bps

A multiplexer combines four 100-Kbps channels using a time slot of 2 bits. What is the bit rate? (A) 100 Kbps (B) 200 Kbps (C) 400 kbps (D) 1000 Kbps

Description : A multiplexer combines four 100-Kbps channels using a time slot of 2 bits. What is the bit rate? (A) 100 Kbps (B) 200 Kbps (C) 400 kbps (D) 1000 Kbps

Last Answer : (C) 400 kbps

Suppose that the one-way propagation delay for a 100 Mbps Ethernet having 48-bit jamming signal is 1.04 micro-seconds. The minimum frame size in bits is: a. 112 b. 160 c. 208 d. 256

Description : Suppose that the one-way propagation delay for a 100 Mbps Ethernet having 48-bit jamming signal is 1.04 micro-seconds. The minimum frame size in bits is: a. 112 b. 160 c. 208 d. 256

Last Answer : d. 256

Given code word 1110001010 is to be transmitted with even parity check bit. The encoded word to be transmitted for this code is (A) 11100010101 (B) 11100010100 (C) 1110001010 (D) 111000101

Description : Given code word 1110001010 is to be transmitted with even parity check bit. The encoded word to be transmitted for this code is (A) 11100010101 (B) 11100010100 (C) 1110001010 (D) 111000101

Last Answer : (A) 11100010101 

Suppose that the number of instructions executed between page faults is directly proportional to the number of page frames allocated to a program. If the available memory is doubled, the mean interval between page faults is also doubled. Further, consider that a normal instruction takes one micro second, but if a page fault occurs, it takes 2001 micro seconds. If a program takes 60 sec to run, during which time it gets 15000 page faults, how long would it take to run if twice as much memory were available? (A) 60 sec (B) 30 sec (C) 45 sec (D) 10 sec

Description : Suppose that the number of instructions executed between page faults is directly proportional to the number of page frames allocated to a program. If the available memory is doubled, the mean interval between page faults is also ... memory were available? (A) 60 sec (B) 30 sec (C) 45 sec (D) 10 sec

Last Answer : Answer: C Explanation: T = Ninstr x 1µs + 15,000 x 2,000 µs = 60s Ninstr x 1µs = 60,000,000 µs - 30,000,000 µs = 30,000,000 µs Ninstr = 30,000,000 The number of instruction ... doesn't mean that the program runs twice as fast as on the first system. Here, the performance increase is of 25%.

Suppose that the virtual Address space has eight pages and physical memory with four page frames. If LRU page replacement algorithm is used, .............. number of page faults occur with the reference string. 0 2 1 3 5 4 6 3 7 4 7 3 3 5 5 3 1 1 1 7 2 3 4 1 (A) 11 (B) 12 (C) 10 (D) 9

Description : Suppose that the virtual Address space has eight pages and physical memory with four page frames. If LRU page replacement algorithm is used, .............. number of page faults occur with the reference string. 0 2 1 3 5 4 6 3 7 4 7 3 3 5 5 3 1 1 1 7 2 3 4 1 (A) 11 (B) 12 (C) 10 (D) 9

Last Answer : (A) 11

Words having 8-bits are to be stored into computer memory. The number of lines required for writing into memory are (A) 1. (B) 2. (C) 4. (D) 8.

Description : Words having 8-bits are to be stored into computer memory. The number of lines required for writing into memory are (A) 1. (B) 2. (C) 4. (D) 8.

Last Answer : Ans: D Because 8-bit words required 8 bit data lines.

A byte addressable computer has a memory capacity of 2 m Kbytes and can perform 2 n operations. An instruction involving 3 operands and one operator needs a maximum of (A) 3m bits (B) m + n bits (C) 3m + n bits (D) 3m + n + 30 bits

Description : A byte addressable computer has a memory capacity of 2 m Kbytes and can perform 2 n operations. An instruction involving 3 operands and one operator needs a maximum of (A) 3m bits (B) m + n bits (C) 3m + n bits (D) 3m + n + 30 bits

Last Answer : (D) 3m + n + 30 bits

A memory management system has 64 pages with 512 bytes page size. Physical memory consists of 32 page frames. Number of bits required in logical and physical address are respectively: (1) 14 and 15 (2) 14 and 29 (3) 15 and 14 (4) 16 and 32

Description : A memory management system has 64 pages with 512 bytes page size. Physical memory consists of 32 page frames. Number of bits required in logical and physical address are respectively: (1) 14 and 15 (2) 14 and 29 (3) 15 and 14 (4) 16 and 32

Last Answer : (3) 15 and 14

For a memory with a 16-bit address space, the addressability is a. 16 bits b. 8 bits c. 2^16 bits d. Cannot be determined

Description : For a memory with a 16-bit address space, the addressability is a. 16 bits b. 8 bits c. 2^16 bits d. Cannot be determined

Last Answer : d. Cannot be determined

A memory unit stores 2^16 bytes in 32-bit words. How many address bits are necessary in order to retrieve a single word from this memory unit?

Description : A memory unit stores 2^16 bytes in 32-bit words. How many address bits are necessary in order to retrieve a single word from this memory unit?

Last Answer : Each word is 4 bytes, which occupies 4 consecutive addresses at 16 bits each. The first 14 bits of these addresses will be the same, differing only in the two least significant bits. You only need to specify the first 14 bits, because there are only 2^14 words occupying those 2^16 bytes.

What is the output of the following code AL= 00110100 BL= 00111000 ADD AL, BL AAA a) AL = 6CH b) 12H c) 12 d) C6H

Description : What is the output of the following code AL= 00110100 BL= 00111000 ADD AL, BL AAA a) AL = 6CH b) 12H c) 12 d) C6H

Last Answer : c) 12

Suppose you want to delete the name that occurs before “Vivek” in an alphabetical listing. Which of the following data structures shall be most efficient for this operation? (A) Circular linked list (B) Doubly linked list (C) Linked list (D) Dequeue

Description : Suppose you want to delete the name that occurs before “Vivek” in an alphabetical listing. Which of the following data structures shall be most efficient for this operation? (A) Circular linked list (B) Doubly linked list (C) Linked list (D) Dequeue

Last Answer :  (B) Doubly linked list 

Serial access memories are useful in applications where (A) Data consists of numbers (B) Short access time is required. (C) Each stored word is processed differently. (D) None of these

Description : Serial access memories are useful in applications where (A) Data consists of numbers (B) Short access time is required. (C) Each stored word is processed differently. (D) None of these

Last Answer : (D) None of these Explanation: data naturally needs to flow in and out in serial form.

Consider a 32 - bit microprocessor, with a 16 - bit external data bus, driven by an 8 MHz input clock. Assume that the microprocessor has a bus cycle whose minimum duration equals four input clock cycles. What is the maximum data transfer rate for this microprocessor? (A) 8x106 bytes/sec (B) 4x106 bytes/sec (C) 16x106 bytes/sec (D) 4x109 bytes/sec

Description : Consider a 32 - bit microprocessor, with a 16 - bit external data bus, driven by an 8 MHz input clock. Assume that the microprocessor has a bus cycle whose minimum duration equals four input clock cycles. What ... (A) 8x106 bytes/sec (B) 4x106 bytes/sec (C) 16x106 bytes/sec (D) 4x109 bytes/sec 

Last Answer : (B) 4x106 bytes/sec

Each check bit is grouped with the information bits as specified by a__ a. Parity check code b. Parity check matrix c. Parity check bit d. All of these

Description : Each check bit is grouped with the information bits as specified by a__ a. Parity check code b. Parity check matrix c. Parity check bit d. All of these

Last Answer : b. Parity check matrix

The ............ layer change bits onto electromagnetic signals. A) Physical B) Transport C) Data Link D) Presentation

Description : The ............ layer change bits onto electromagnetic signals. A) Physical B) Transport C) Data Link D) Presentation

Last Answer : A) Physical

A data file of 1,00,000 characters contains only the characters g-l, with the frequencies as indicated in table: using the variable-length code by Huffman codes, the file can be encoded with (A) 2,52,000 bits (B) 2,64,000 bits (C) 2,46,000 bits (D) 2,24,000 bits

Description : A data file of 1,00,000 characters contains only the characters g-l, with the frequencies as indicated in table:  using the variable-length code by Huffman codes, the file can be encoded with (A) 2,52,000 bits (B) 2,64,000 bits (C) 2,46,000 bits (D) 2,24,000 bits

Last Answer : (D) 2,24,000 bits 

Find the false statement: (A) In Modern Cryptography, symmetric key algorithms use same key both for Encryption and Decryption. (B) The Symmetric cipher DES (Data Encryption Standard) was widely used in the industry for security product. (C) The AES (Advanced Encryption Standard) cryptosystem allows variable key lengths of size 56 bits and 124 bits. (D) Public key algorithms use two different keys for Encryption and Decryption.

Description : Find the false statement: (A) In Modern Cryptography, symmetric key algorithms use same key both for Encryption and Decryption. (B) The Symmetric cipher DES (Data Encryption Standard) was widely used ... and 124 bits. (D) Public key algorithms use two different keys for Encryption and Decryption.

Last Answer : (C) The AES (Advanced Encryption Standard) cryptosystem allows variable key lengths of size 56 bits and 124 bits.

In a digital transmission, the receiver clock is 0.1 percent faster than the sender clock. How many extra bits per second does the receiver receive if the data rate is 1 Mbps ? (A) 10 bps (B) 100 bps (C) 1000 bps (D) 10000 bps

Description : In a digital transmission, the receiver clock is 0.1 percent faster than the sender clock. How many extra bits per second does the receiver receive if the data rate is 1 Mbps ? (A) 10 bps (B) 100 bps (C) 1000 bps (D) 10000 bps

Last Answer : (C) 1000 bps 

If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) a. doubles b. remains unchanged c. halves d. increases by 2^(address bits)/addressability

Description : If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) a. doubles b. remains unchanged c. halves d. increases by 2^(address bits)/addressability

Last Answer : c. halves

A DMA controller transfers 32-bit words to memory using cycle Stealing. The words are assembled from a device that transmits characters at a rate of 4800 characters per second. The CPU is fetching and executing instructions at an average rate of one million instructions per second. By how much will the CPU be slowed down because of the DMA transfer? (A) 0.06% (B) 0.12% (C) 1.2% (D) 2.5%

Description : A DMA controller transfers 32-bit words to memory using cycle Stealing. The words are assembled from a device that transmits characters at a rate of 4800 characters per second. The CPU is fetching and executing instructions at an average ... of the DMA transfer? (A) 0.06% (B) 0.12% (C) 1.2% (D) 2.5%

Last Answer : Answer: B

In 8279, the keyboard entries are debounced and stored in an _________, that is further accessed by the CPU to read the key codes. a) 8-bit FIFO b) 8-byte FIFO c) 16 byte FIFO d) 16 bit FIFO

Description : In 8279, the keyboard entries are debounced and stored in an _________, that is further accessed by the CPU to read the key codes. a) 8-bit FIFO b) 8-byte FIFO c) 16 byte FIFO d) 16 bit FIFO

Last Answer : b) 8-byte FIFO

Suppose ORACLE relation R(A, B) currently has tuples {(1, 2), (1, 3), (3, 4)} and relation S(B, C) currently has {(2, 5), (4, 6), (7, 8)}. Consider the following two SQL queries SQ1 and SQ2 : SQ1 : Select * From R Full Join S On R.B=S.B; SQ2 : Select * From R Inner Join S On R.B=S.B; The numbers of tuples in the result of the SQL query SQ1 and the SQL query SQ2 are given by : (A) 2 and 6 respectively (B) 6 and 2 respectively (C) 2 and 4 respectively (D) 4 and 2 respectively

Description : Suppose ORACLE relation R(A, B) currently has tuples {(1, 2), (1, 3), (3, 4)} and relation S(B, C) currently has {(2, 5), (4, 6), (7, 8)}. Consider the following two SQL queries SQ1 and SQ2 ... (A) 2 and 6 respectively (B) 6 and 2 respectively (C) 2 and 4 respectively (D) 4 and 2 respectively

Last Answer : (D) 4 and 2 respectively

How many 8-bit characters can be transmitted per second over a 9600 baud serial communication link using asynchronous mode of transmission with one start bit, eight data bits, two stop bits, and one parity bit ? a. 600 b. 800 c. 876 d. 1200

Description : How many 8-bit characters can be transmitted per second over a 9600 baud serial communication link using asynchronous mode of transmission with one start bit, eight data bits, two stop bits, and one parity bit ? a. 600 b. 800 c. 876 d. 1200

Last Answer : b. 800

Classification of protocol that interprets a frame of data as a group of successive bit combined into predetermined pattern of fixed length, usually 8 bits each.

Description : Classification of protocol that interprets a frame of data as a group of successive bit combined into predetermined pattern of fixed length, usually 8 bits each.

Last Answer : Character and Byte-oriented protocols

Assuming 8 bits for data, 1 bit for parity, I start bit and 2 stop bits, ...

Description : Assuming 8 bits for data, 1 bit for parity, I start bit and 2 stop bits, the number of characters that 1200 BPS communication line can transmit is

Last Answer : Assuming 8 bits for data, 1 bit for parity, I start bit and 2 stop bits, the number of characters that 1200 BPS communication line can transmit is 12CPS.

Four bits are used for packed sequence numbering in a sliding window protocol used in a computer network. What is the maximum window size ? (A) 4 (B) 8 (C) 15 (D) 16

Description : Four bits are used for packed sequence numbering in a sliding window protocol used in a computer network. What is the maximum window size ?  (A) 4 (B) 8 (C) 15 (D) 16

Last Answer : (C) 15 

What is the size of the 'total length' field in IPv 4 datagram ? (A) 4 bits (B) 8 bits (C) 16 bits (D) 32 bits

Description : What is the size of the 'total length' field in IPv 4 datagram ? (A) 4 bits (B) 8 bits (C) 16 bits (D) 32 bits

Last Answer : (C) 16 bits 

A network with bandwidth of 10 Mbps can pass only an average of 15,000 frames per minute with each frame carrying an average of 8,000 bits. What is the throughput of this network ? (A) 2 Mbps (B) 60 Mbps (C) 120 Mbps (D) 10 Mbps

Description : A network with bandwidth of 10 Mbps can pass only an average of 15,000 frames per minute with each frame carrying an average of 8,000 bits. What is the throughput of this network ? (A) 2 Mbps (B) 60 Mbps (C) 120 Mbps (D) 10 Mbps

Last Answer : (A) 2 Mbps Explanation: In data transmission, throughput is the amount of data moved successfully from one place to another in a given period of time, and typically measured in bits per second (bps), ... second (Mbps) or gigabits per second (Gbps). Here, Throughput = 15000 x 8000/60 = 2 Mbps 

Consider a source with symbols A, B, C, D with probabilities 1/2, 1/4, 1/8, 1/8 respectively. What is the average number of bits per symbol for the Huffman code generated from above information? (A) 2 bits per symbol (B) 1.75 bits per symbol (C) 1.50 bits per symbol (D) 1.25 bits per symbol

Description : Consider a source with symbols A, B, C, D with probabilities 1/2, 1/4, 1/8, 1/8 respectively. What is the average number of bits per symbol for the Huffman code generated from above information? (A) 2 bits per symbol (B) 1.75 bits per symbol (C) 1.50 bits per symbol (D) 1.25 bits per symbol

Last Answer : (B) 1.75 bits per symbol

If link transmits 4000 frames per second and each slot has 8 bits, the transmission rate of circuit of this TDM is ............... (A) 64 Kbps (B) 32 Mbps (C) 32 Kbps (D) 64 Mbps

Description : If link transmits 4000 frames per second and each slot has 8 bits, the transmission rate of circuit of this TDM is ............... (A) 64 Kbps (B) 32 Mbps (C) 32 Kbps (D) 64 Mbps

Last Answer : (C) 32 Kbps

Suppose transmission rate of a channel is 32 kbps. If there are ‘8’ routes from source to destination and each packet p contains 8000 bits. Total end to end delay in sending packet P is _____. a. 2 sec b. 3 sec c. 4 sec d. 1 sec

Description : Suppose transmission rate of a channel is 32 kbps. If there are ‘8’ routes from source to destination and each packet p contains 8000 bits. Total end to end delay in sending packet P is _____. a. 2 sec b. 3 sec c. 4 sec d. 1 sec

Last Answer : a. 2 sec

The system is notified of a read or write operation by ___________ a) Appending an extra bit of the address b) Enabling the read or write bits of the devices c) Raising an appropriate interrupt signal d) Sending a special signal along the BUS

Description : The system is notified of a read or write operation by ___________ a) Appending an extra bit of the address b) Enabling the read or write bits of the devices c) Raising an appropriate interrupt signal d) Sending a special signal along the BUS

Last Answer : Sending a special signal along the BUS

When the set of input data to an even parity generator is 0111, the output will be (A) 1 (B) 0 (C) Unpredictable (D) Depends on the previous input

Description : When the set of input data to an even parity generator is 0111, the output will be (A) 1 (B) 0 (C) Unpredictable (D) Depends on the previous input

Last Answer : Ans: B In even parity generator if number of 1 is odd then output will be zero.