The ___ bit decides whether it is a system descriptor or code/data segment descriptor
a) P
b) S c) D d) G

1 Answer

Answer :

a) P

Related questions

Description : 80386 support which type of descriptor table from the following? a) TDS b) ADS c) GDS d) MDS

Last Answer : c) GDS

Description : SP of 8051 is of ___ wide and it is loaded with the default value of ___ after reset. a) 2 byte, 08H b) 8 bit, 07H c) 1 byte, 09H d) 8 bit, 06H

Last Answer : d) 8 bit, 06H

Description : In 8096, mode ____ of serial port are ___ modes commonly used for ____ communications. a) 1, 8bit, single processor b) 0, 7bit, multiple microcontroller c) 2, 9 bit, multiple processors d) 3, 8 bit, multiple microcontroller

Last Answer : a) 1, 8bit, single processor

Description : Intel 8096 is of ___ bit microcontroller family called as ______. a) 8, MCS51 b) 16, MCS51 c) 8, MCS96 d) 16, MCS96

Last Answer : d) 16, MCS96

Description : The SP is of ___ wide register. And this may be defined anywhere in the ______. a) 8 byte, on-chip 128 byte RAM. b) 8 bit, on chip 256 byte RAM. c) 16 bit,

Last Answer : a) 8 byte, on-chip 128 byte RAM.

Description : In 8096, mode ____ of serial port are ___ modes commonly used for ____ communications. a) 1, 8bit, single processor b) 0, 7bit, multiple microcontroller c) 2, 9 bit, multiple processors d) 3, 8 bit, multiple microcontroller

Last Answer : c) 2, 9 bit, multiple processors

Description : Intel 8096 is of ___ bit microcontroller family called as ______. a) 8, MCS51 b) 16, MCS51 c) 8, MCS96 d) 16, MCS96

Last Answer : d) 16, MCS96

Description : 8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH 17. If the __ pin is ___ , then we have the option ... b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal

Last Answer : c) EA, high, external, internal

Description : __ bit in ICW1 indicates whether the 8259A is cascade mode or not? a) LTIM=0 b) LTIM=1 c) SNGL=0 d) SNGL=1

Last Answer : c) SNGL=0

Description : ___ memory system which is discussed later can improve matters in this respect: a. Data memory b. Cache memory c. Memory d. None of these

Last Answer : b. Cache memory

Description : The Unix Kernel maintains two key data structures related to processes, the process table and the user structure. Which of following information is not the part of user structure? (A) File descriptor table (B) System call state (C) Scheduling parameters (D) Kernel stack

Last Answer : (C) Scheduling parameters

Description : Which type of computers uses the 8-bit code called EBCDIC? a. Minicomputers b. Microcomputers c. Mainframe computers d. Super computer

Last Answer : c. Mainframe computers

Description : The original ASCII code used…bits of each byte, reserving that last bit for error checking a. 5 b. 6 c. 7 d. 8

Last Answer : c. 7

Description : A technique used by codes to convert an analog signal into a digital bit stream is known as a. Pulse code modulation b. Pulse stretcher c. Query processing d. Queue management

Last Answer : a. Pulse code modulation

Description : Instructions and memory address are represented by a. Character code b. Binary codes c. Binary word d. Parity bit

Last Answer : b. Binary codes

Description : EBCDIC stands for a. Extended Binary Coded Decimal Interchange Code b. Extended Bit Code Decimal Interchange Code c. Extended Bit Case Decimal Interchange Code d. Extended Binary Case Decimal Interchange Code

Last Answer : a. Extended Binary Coded Decimal Interchange Code

Description : The ascending order or a data Hierarchy is a. bit - bytes - fields - record - file - database b. bit - bytes - record - field - file - database c. bytes - bit- field - record - file - database d. bytes -bit - record - field - file - database

Last Answer : a. bit - bytes - fields - record - file - database

Description : The data recording format in most of the modern magnetic tape is a. 7-bit ASCII b. 7-bit EBCDIC c. 8-bit ASCII d. 8-bit EBCDIC

Last Answer : d. 8-bit EBCDIC

Description : Why 8085 processor is called an 8 bit processor? a) Because 8085 processor has 8 bit ALU. b) Because 8085 processor has 8 bit data bus. c) a & b.

Last Answer : a) Because 8085 processor has 8 bit ALU.

Description : The microprocessor can read/write 16 bit data from or to ________ A. memory B. I /O device C. processor D. register

Last Answer : The microprocessor can read/write 16 bit data from or to memory 

Description : The value memvar must be transferred to the ___: a. Computer b. CPU c. Both A and B d. None of these

Last Answer : b. CPU

Description : The CPU removes the ___ signal to complete the memory write operation: a. Read b. Write c. Both A and B d. None of these

Last Answer : a. Read

Description : Which point to the ___ of the stack: a. TOP b. START c. MID

Last Answer : a. TOP

Description : 80386 support overall ___ addressing modes to facilitate efficient execution of higher level language programs. a) 9 b) 10 c) 11 d) 12

Last Answer : 11

Description : 8096 has ___ general purpose I/O ports, Port 2 includes ______ of the following i) two quasi-bidirectional I/O lines ii) two output lines iii) four input lines iv) open drain outputs a) 4, i, iv b) 6, ii, iii c) 4, i,ii,iii d) 6, i, ii, iv

Last Answer : c) 4, i,ii,iii

Description : ___ Connection and the _______ instruction will solve the problem of synchronization between processor and coprocessor. a) INT & NMI, WAIT b) RQ/GT0 & RQ/GT1, FWAIT c) BUSY & TEST, FWAIT d) S0 & QS0, WAIT

Last Answer : b) RQ/GT0 & RQ/GT1, FWAIT

Description : In 8279, a scanned sensor matrix mode, if a sensor changes its state, the ___ line goes ____ to interrupt the CPU. a) CS, high b) A0, high c) IRQ, high d) STB, high

Last Answer : c) IRQ, high

Description : If the __ pin is ___ , then we have the option of using the ____ ROM or EPROM together with _____ memory and devices. a) EA, high, internal, external b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal

Last Answer : a) EA, high, internal, external

Description : 8096 has ___ general purpose I/O ports, Port 2 includes ______ of the following i) two quasi-bidirectional I/O lines ii) two output lines iii) four input lines iv) open drain outputs a) 4, i, iv b) 6, ii, iii c) 4, i,ii,iii d) 6, i, ii, iv

Last Answer : c) 4, i,ii,iii

Description : Which of the following is not a program linking directive i) EXTRN ii) SEGMENT iii) NAME iv) PUBLIC v) USING a) iv, v b) ii, iii c) i, iii d) ii, v

Last Answer : c) i, iii

Description : The 8279 normally provides a maximum of _____ seven segment display interface with CPU. a) 8 b) 16 c) 32 d) 18

Last Answer : a) 8

Description : The most commonly used standard data code to represent alphabetical, numerical and punctuation characters used in electronic data processing system is called a. ASCII b. EBCDIC c. BCD d. All of above

Last Answer : a. ASCII

Description : How many bit microprocessor still survives in low-end application such as microwave ovens and small control system: a. 4 bit b. 16 bit c. 32 bit d. 64 bit

Last Answer : a. 4 bit

Description : Processors of all computers, whether micro, mini or mainframe must have a. ALU b. Primary Storage c. Control unit d. All of above

Last Answer : b. Primary Storage

Description : A memory that is capable of determining whether a given datum is contained in one of its address is a. ROM b. PROM c. CAM d. RAM

Last Answer : c. CAM

Description : RIM is used to check whether, ______ a) The write operation is done or not b) The interrupt is Masked or not c) a & b

Last Answer : b) The interrupt is Masked or not

Description : List the 16 – bit registers of 8085 microprocessor.

Last Answer : Stack pointer (SP) and Program counter (PC).

Description : Which is not the main feature of DEC Alpha: a. 64 Bit RISC processor b. Designed to replace 32 VAX(CISC) c. Seven stage split integer/floating point pipeline d. Variable Instruction length

Last Answer : d. Variable Instruction length

Description : Which is not the main architectural feature of Power PC: a. It is not based on RISC b. Superscalar implementation c. Both 32 & 64 Bit d. Paged Memory management architecture

Last Answer : a. It is not based on RISC

Description : Which processor provided 1 MB memory: a. 16-bit 8086 and 8088 b. 32-bit 8086 and 8088 c. 64-bit 8086 and 8088 d. 8-bit 8086 and 8088

Last Answer : a. 16-bit 8086 and 8088

Description : Which is 16 Bit microprocessor: a. 8088 b. 8086 c. 8085 d. All of these

Last Answer : d. All of these

Description : How many bit microprocessor developed by Intel: a. 4 bit b. 8 bit c. 32 bit d. 64 bit

Last Answer : b. 8 bit

Description : Calculator are based on______ microprocessor: a. 4 bit b. 16 bit c. 32 bit d. 64 bit

Last Answer : a. 4 bit

Description : The evolution of the 4 bit microprocessor ended when Intel released in: a. 4004 b. 8008 c. 40964 d. 4040

Last Answer : d. 4040

Description : How many bit MC6800 microprocessor: a. 4-bit b. 8-bit c. 16-bit d. 32-bit

Last Answer : b. 8-bit

Description : Motorola introduced 32 bit RISC processor called______: a. MC 88100 b. MC 81100 c. MC 80100 d. MC 81000

Last Answer : a. MC 88100

Description : Motorola introduced _____ processor: a. 2 bit-RISC b. 4 bit-RISC c. 8 bit-RISC d. 32 bit-RISC

Last Answer : d. 32 bit-RISC

Description : How many bit microprocessor in the era marked beginning of fourth generation: a. 4 bit b. 8 bit c. 16 bit d. 32 bit

Last Answer : d. 32 bit

Description : Third generation microprocessor is dominated by____ microprocessor: a. 8 bit b. 4 bit c. 16 bit d. 64 bit

Last Answer : c. 16 bit