___ Connection and the _______ instruction will solve the problem of synchronization between processor and coprocessor. a) INT & NMI, WAIT b) RQ/GT0 & RQ/GT1, FWAIT c) BUSY & TEST, FWAIT d) S0 & QS0, WAIT

___ Connection and the _______ instruction will solve the problem of synchronization between processor and coprocessor.
a) INT & NMI, WAIT
b) RQ/GT0 & RQ/GT1, FWAIT
c) BUSY & TEST, FWAIT d) S0 & QS0, WAIT
by

1 Answer

Answer :

b) RQ/GT0 & RQ/GT1, FWAIT
by

Related questions

______ input is available, so that another coprocessor can be connected and function in _________ with the 8087. . a) RQ/GT0, parallel b) RQ/GT1, parallel c) QS1 & QS0, parallel d) S0 & S1, parallel.

Description : ______ input is available, so that another coprocessor can be connected and function in _________ with the 8087. . a) RQ/GT0, parallel b) RQ/GT1, parallel c) QS1 & QS0, parallel d) S0 & S1, parallel.

Last Answer : a) RQ/GT0, parallel

If ______ and ________ connections are made so that an error condition in 8087 can interrupt to the processor. a) BHE, RQ/GT1 b) BUSY, TEST c) INT, NMI d) RQ/GT0, RQ/GT1

Description : If ______ and ________ connections are made so that an error condition in 8087 can interrupt to the processor. a) BHE, RQ/GT1 b) BUSY, TEST c) INT, NMI d) RQ/GT0, RQ/GT1

Last Answer : c) INT, NMI

One of the following signals belongs to the 8087 coprocessor is a. HOLD b. BUSY c. TEST d. NMI

Description : One of the following signals belongs to the 8087 coprocessor is a. HOLD b. BUSY c. TEST d. NMI

Last Answer : c. TEST

Why 8087 is referred to as Coprocessor? i) Because 8087 is used in parallel with main processor in a system, rather than serving as a main processor itself. ii) Because 8087 is used in serial with main processor in a system, rather than serving as a main processor itself. iii) Because main Microprocessor handles the general program execution and the 8087 handles specialized math computations. a) i & iii b) ii & iii c) iii only. d) i only.

Description : Why 8087 is referred to as Coprocessor? i) Because 8087 is used in parallel with main processor in a system, rather than serving as a main processor itself. ii) Because 8087 is used in serial with main processor in a ... math computations. a) i & iii b) ii & iii c) iii only. d) i only.

Last Answer : c) iii only.

The coprocessors operate in ______ with a processor on the same buses and with the same instruction _______. a) Parallel, byte stream. b) Series, byte stream. c) Series, bite stream d) Parallel, bite stream.

Description : The coprocessors operate in ______ with a processor on the same buses and with the same instruction _______. a) Parallel, byte stream. b) Series, byte stream. c) Series, bite stream d) Parallel, bite stream.

Last Answer : a) Parallel, byte stream.

n 8086 microprocessor the following has the highest priority among all type interrupts. a) NMI b) DIV 0 c) TYPE 255 d) OVER FLOW

Description : n 8086 microprocessor the following has the highest priority among all type interrupts. a) NMI b) DIV 0 c) TYPE 255 d) OVER FLOW

Last Answer : a) NMI

In 8096, mode ____ of serial port are ___ modes commonly used for ____ communications. a) 1, 8bit, single processor b) 0, 7bit, multiple microcontroller c) 2, 9 bit, multiple processors d) 3, 8 bit, multiple microcontroller

Description : In 8096, mode ____ of serial port are ___ modes commonly used for ____ communications. a) 1, 8bit, single processor b) 0, 7bit, multiple microcontroller c) 2, 9 bit, multiple processors d) 3, 8 bit, multiple microcontroller

Last Answer : a) 1, 8bit, single processor

In 8096, mode ____ of serial port are ___ modes commonly used for ____ communications. a) 1, 8bit, single processor b) 0, 7bit, multiple microcontroller c) 2, 9 bit, multiple processors d) 3, 8 bit, multiple microcontroller

Description : In 8096, mode ____ of serial port are ___ modes commonly used for ____ communications. a) 1, 8bit, single processor b) 0, 7bit, multiple microcontroller c) 2, 9 bit, multiple processors d) 3, 8 bit, multiple microcontroller

Last Answer : c) 2, 9 bit, multiple processors

Which is not the main feature of DEC Alpha: a. 64 Bit RISC processor b. Designed to replace 32 VAX(CISC) c. Seven stage split integer/floating point pipeline d. Variable Instruction length

Description : Which is not the main feature of DEC Alpha: a. 64 Bit RISC processor b. Designed to replace 32 VAX(CISC) c. Seven stage split integer/floating point pipeline d. Variable Instruction length

Last Answer : d. Variable Instruction length

In 8086 microprocessor one of the following statements is not true.a)Coprocessor is interfaced in MAX mode b)Coprocessor is interfaced in MIN mode c)I/O can be interfaced in MAX / MIN moded)Supports pipelining

Description : In 8086 microprocessor one of the following statements is not true.a)Coprocessor is interfaced in MAX mode b)Coprocessor is interfaced in MIN mode c)I/O can be interfaced in MAX / MIN moded)Supports pipelining

Last Answer : b)Coprocessor is interfaced in MIN mode

In 8087 coprocessor one of the following instructions is not valid a. FSIN b. FPTAN c. FIDIV d. FSQRT

Description : In 8087 coprocessor one of the following instructions is not valid a. FSIN b. FPTAN c. FIDIV d. FSQRT

Last Answer : a. FSIN

8088 microprocessor differs with 8086 microprocessor in a) Data width on the output b) Address capability c) Support of coprocessor d) Support of MAX / MIN mode

Description : 8088 microprocessor differs with 8086 microprocessor in a) Data width on the output b) Address capability c) Support of coprocessor d) Support of MAX / MIN mode

Last Answer : a) Data width on the output

In 8086 microprocessor one of the following statements is not true. a) Coprocessor is interfaced in MAX mode b) Coprocessor is interfaced in MIN mode c) I/O can be interfaced in MAX / MIN mode

Description : In 8086 microprocessor one of the following statements is not true. a) Coprocessor is interfaced in MAX mode b) Coprocessor is interfaced in MIN mode c) I/O can be interfaced in MAX / MIN mode

Last Answer : b) Coprocessor is interfaced in MIN mode

8087 connection to 8086, to enable the _________ bank of memory _______pins are to be connected. a) Lower, BHE b) Upper, BHE c) Lower, INT d) Upper, INT.

Description : 8087 connection to 8086, to enable the _________ bank of memory _______pins are to be connected. a) Lower, BHE b) Upper, BHE c) Lower, INT d) Upper, INT.

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The intel 8086 microprocessor is a _______ processor A. 8 bit B. 16 bit C. 32 bit D. 4 bit

Description : The intel 8086 microprocessor is a _______ processor A. 8 bit B. 16 bit C. 32 bit D. 4 bit

Last Answer : The intel 8086 microprocessor is a 16 bit processor 

_______ Stores the instruction currently being executed: a. Instruction register b. Current register c. Both a and b d. None of these

Description : _______ Stores the instruction currently being executed: a. Instruction register b. Current register c. Both a and b d. None of these

Last Answer : a. Instruction register

Pentium Pro Processor contains: a. L1 Cache b. L2 Cache c. Both L1 & L2 d. None of these

Description : Pentium Pro Processor contains: a. L1 Cache b. L2 Cache c. Both L1 & L2 d. None of these

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The processor uses the stack to keep track of where the items are stored on it this by using the: a. Stack pointer register b. Queue pointer register c. Both a & b d. None of these

Description : The processor uses the stack to keep track of where the items are stored on it this by using the: a. Stack pointer register b. Queue pointer register c. Both a & b d. None of these

Last Answer : a. Stack pointer register

Why 8085 processor is called an 8 bit processor? a) Because 8085 processor has 8 bit ALU. b) Because 8085 processor has 8 bit data bus. c) a & b. Why 8085 processor is called an 8 bit processor? a) Because 8085 processor has 8 bit ALU. b) Because 8085 processor has 8 bit data bus. c) a & b.

Description : Why 8085 processor is called an 8 bit processor? a) Because 8085 processor has 8 bit ALU. b) Because 8085 processor has 8 bit data bus. c) a & b.

Last Answer : a) Because 8085 processor has 8 bit ALU.

.............. refers to a situation in which a process is ready to execute but is continuously denied access to a processor in deference to other processes. A) Synchronization B) Mutual Exclusion C) Dead lock D) Starvation

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___ memory system which is discussed later can improve matters in this respect: a. Data memory b. Cache memory c. Memory d. None of these

Description : ___ memory system which is discussed later can improve matters in this respect: a. Data memory b. Cache memory c. Memory d. None of these

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The value memvar must be transferred to the ___: a. Computer b. CPU c. Both A and B d. None of these

Description : The value memvar must be transferred to the ___: a. Computer b. CPU c. Both A and B d. None of these

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Which point to the ___ of the stack: a. TOP b. START c. MID

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80386 support overall ___ addressing modes to facilitate efficient execution of higher level language programs. a) 9 b) 10 c) 11 d) 12

Description : 80386 support overall ___ addressing modes to facilitate efficient execution of higher level language programs. a) 9 b) 10 c) 11 d) 12

Last Answer : 11

The ___ bit decides whether it is a system descriptor or code/data segment descriptor a) P b) S c) D d) G

Description : The ___ bit decides whether it is a system descriptor or code/data segment descriptor a) P b) S c) D d) G

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SP of 8051 is of ___ wide and it is loaded with the default value of ___ after reset. a) 2 byte, 08H b) 8 bit, 07H c) 1 byte, 09H d) 8 bit, 06H

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8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH 17. If the __ pin is ___ , then we have the option of using the ____ ROM or EPROM together with _____ memory and devices. a) EA, high, internal, external b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal

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Last Answer : c) EA, high, external, internal

8096 has ___ general purpose I/O ports, Port 2 includes ______ of the following i) two quasi-bidirectional I/O lines ii) two output lines iii) four input lines iv) open drain outputs a) 4, i, iv b) 6, ii, iii c) 4, i,ii,iii d) 6, i, ii, iv

Description : 8096 has ___ general purpose I/O ports, Port 2 includes ______ of the following i) two quasi-bidirectional I/O lines ii) two output lines iii) four input lines iv) open drain outputs a) 4, i, iv b) 6, ii, iii c) 4, i,ii,iii d) 6, i, ii, iv

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Intel 8096 is of ___ bit microcontroller family called as ______. a) 8, MCS51 b) 16, MCS51 c) 8, MCS96 d) 16, MCS96

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The SP is of ___ wide register. And this may be defined anywhere in the ______. a) 8 byte, on-chip 128 byte RAM. b) 8 bit, on chip 256 byte RAM. c) 16 bit,

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In 8279, a scanned sensor matrix mode, if a sensor changes its state, the ___ line goes ____ to interrupt the CPU. a) CS, high b) A0, high c) IRQ, high d) STB, high

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If the __ pin is ___ , then we have the option of using the ____ ROM or EPROM together with _____ memory and devices. a) EA, high, internal, external b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal

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8096 has ___ general purpose I/O ports, Port 2 includes ______ of the following i) two quasi-bidirectional I/O lines ii) two output lines iii) four input lines iv) open drain outputs a) 4, i, iv b) 6, ii, iii c) 4, i,ii,iii d) 6, i, ii, iv

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Last Answer : c) 4, i,ii,iii

Intel 8096 is of ___ bit microcontroller family called as ______. a) 8, MCS51 b) 16, MCS51 c) 8, MCS96 d) 16, MCS96

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Last Answer : a. 16-bit 8086 and 8088

Which process information at a much faster rate than it can retrieve it from memory: a. ALU b. Processor c. Microprocessor d. CPU

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Motorola introduced 32 bit RISC processor called______: a. MC 88100 b. MC 81100 c. MC 80100 d. MC 81000

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Which are some of popular processor: a. Motorola 6800 and 6809 b. Intel 8085 c. Zilog Z80 d. All the above

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The first processor to include Virtual memory in the Intel microprocessor familywas: a.)80286 b.)80386c.)80486d.)Pentium

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