Description : Serial port vector address is of _______. And causes an interrupt when ________. a) 0013H, either TI or RI flag is set b) 0023H, either TI or RI flag is reset c) 0013H, either TI or RI flag is reset d) 0023H, either TI or RI flag is set
Last Answer : a) 0013H, either TI or RI flag is set
Description : Serial port interrupt is generated, if ____ bits are set a) IE b) RI, IE c) IP, TI d) RI, TI
Last Answer : a) IE
Last Answer : d) RI, TI
Description : What is meant by interrupt?
Last Answer : Interrupt is an external signal that causes a microprocessor to jump to a specific subroutine.
Description : List the four instructions which control the interrupt structure of the 8085 microprocessor.
Last Answer : • DI ( Disable Interrupts ) • EI ( Enable Interrupts ) • RIM ( Read Interrupt Masks ) • SIM ( Set Interrupt Masks )
Description : Serial port interrupt is generated, if ____ bits are seta) IE b) RI, IE c) IP, TI d) RI, TI
Description : The external device is connected to a pin called the ______ pin on the processor chip. a. Interrupt b. Transfer c. Both d. None of these
Last Answer : a. Interrupt
Description : Which are the flags of status register: a. Over flow flag b. Carry flag c. Half carry flag d. Zero flag e. Interrupt flag f. Negative flag g. All of these
Last Answer : g. All of these
Description : The interrupt vector table of 80386 has been allocated ______ space starting from _______ to _______. a) 1Kbyte, 00000H, 003FFH b) 2Kbyte, 10000H, 004FFH c) 3Kbyte, 01000H, 007FFH d) 4Kbyte, 01000H, 009FFH
Last Answer : c) 3Kbyte, 01000H, 007FFH
Description : In 8051 an external interrupt 1 vector address is of ________ and causes of interrupt if ____. a) 000BH, a high to low transition on pin INT1 b) 001BH, a low to high transition on pin INT1 c) 0013H, a high to low transition on pin INT1 d) 0023H, a low to high transition on pin INT1
Last Answer : a) 000BH, a high to low transition on pin INT1
Description : In 8096 we have _____interrupt sources and _______ interrupt vectors. a) 18, 8 b) 21, 6 c) 21, 8 d) 16, 8
Last Answer : c) 21, 8
Description : In 8051 which interrupt has highest priority? a)IE1 b)TF0 c)IE0 d)TF1
Last Answer : a)IE1
Description : If ______ and ________ connections are made so that an error condition in 8087 can interrupt to the processor. a) BHE, RQ/GT1 b) BUSY, TEST c) INT, NMI d) RQ/GT0, RQ/GT1
Last Answer : c) INT, NMI
Description : 8086 is interfaced to two 8259s (Programmable interrupt controllers). If 8259s are in master slave configuration the number of interrupts available to the 8086 microprocessor is a) 8 b) 16 c) 15 d) 64
Last Answer : a) 8
Description : In 8279, a scanned sensor matrix mode, if a sensor changes its state, the ___ line goes ____ to interrupt the CPU. a) CS, high b) A0, high c) IRQ, high d) STB, high
Last Answer : c) IRQ, high
Last Answer : c) 21,
Last Answer : c)IE0
Description : What is meant by Maskable interrupts? a) An interrupt which can never be turned off. b) An interrupt that can be turned off by the programmer. c) none
Last Answer : b) An interrupt that can be turned off by the programmer.
Description : RIM is used to check whether, ______ a) The write operation is done or not b) The interrupt is Masked or not c) a & b
Last Answer : b) The interrupt is Masked or not
Description : Which interrupt is not level sensitive in 8085? a) RST6.5 is a raising edge-trigging interrupt. b) RST7.5 is a raising edge-trigging interrupt. c) a & b.
Last Answer : b) RST7.5 is a raising edge-trigging interrupt.
Description : Which interrupt has the highest priority? a) INTR b) TRAP c) RST6.5
Last Answer : c) RST6.5
Description : The arranging of data in a logical sequence is called a. Sorting b. Classifying c. Reproducing d. Summarizing
Last Answer : a. Sorting
Description : Customized ROMS are called: a. Mask ROM b. Flash ROM c. EPROM d. None of these
Last Answer : a. Mask ROM
Description : The Register that stores all interrupt requests is: (A) Interrupt mask register (B) Interrupt service register (C) Interrupt request register (D) Status register
Last Answer : (C) Interrupt request register
Description : If m is a power of 2, the number of select lines required for an m-input mux is: a. m b. 2^m c. log2 (m) d. 2*m
Last Answer : c. log2 (m)
Description : Which statement is wrong according to linear decoding : a. Address map is not contiguous. b. Confects occur if two of the select lines become active at the same time c. If all unused address lines are not used as chip selectors then these unused lines become don’t cares d. None of these
Last Answer : d. None of these
Description : CS stands for: a. Cable select b. Chip select c. Control select d. Cable system
Last Answer : b. Chip select
Description : MOS stands for: a. Metal oxide semiconductor b. Memory oxide semiconductor c. Metal oxide select d. None of these
Last Answer : a. Metal oxide semiconductor
Description : In 8096, CCB bit 3 is ____. a) write strobe mode select b) address valid strobe select c) bus width select d) Internal read control mode
Last Answer : c) bus width select
Last Answer : b) address valid strobe select
Description : How many operations are there in the instruction set of 8085 microprocessor?
Last Answer : There are 74 operations in the 8085 microprocessor.
Description : CISC stands for: a. Complex instruction set computer b. Camper instruct set of computer c. Compared instruction set computer d. None of these
Last Answer : a. Complex instruction set computer
Description : RISC stands for: a. Reduced Instruction set computer b. Reduced Instruct set compare c. Reduced instruction stands computer d. All of these 107. DEC stands for:
Last Answer : a. Reduced Instruction set computer
Description : ISA stands for: a. Instruct set area b. Instruction set architecture c. Both a and b d. None of these
Last Answer : b. Instruction set architecture
Description : RISC stands for: a. Reduced Instruction Set Computer b. Reduced Intergraded Set Computer c. Resource Instruction Set Computer d. Resource Instruction System Computer
Last Answer : a. Reduced Instruction Set Computer
Description : CISC stands for: a. Complex Instruction System Computer b. Complex Instruction Set Car c. Complex Instruction Set Computer d. None of these
Last Answer : c. Complex Instruction Set Computer
Description : A stack is a. an 8-bit register in the microprocessor b. a 16-bit register in the microprocessor c. a set of memory locations in R/WM reserved for storing information temporarily during the execution of computer
Last Answer : c. a set of memory locations in R/WM reserved for storing information temporarily during the execution of computer
Description : We say that a set of gates is logically complete if we can build any circuit without using any other kind of gates. Which of the following sets are logically complete a. set of {AND,OR} b. set of {EXOR, NOT} c. set of {AND,OR,NOT} d. None of the above
Last Answer : c. set of {AND,OR,NOT}
Description : 8253, 8257 c) 8257,8251 d)8251,825721.Consider the following set of 8085 instruction.MVI A,82HORA AJP DSPLYXRA ADSPLY:OUT PORT1HLT.The output at PORT1 isa) 00H b) FFH c) 92H d) 11H
Last Answer : a) 00H
Description : In an 8085 microprocessor, the instruction CMP B has been executed while the contentsof accumulator is less than that of register B. As a result carry flag and zero flag will berespectively (A) set, reset (B) reset, set (C) reset, reset (D) set, set
Last Answer : (A) set, reset
Description : A set of information that defines the status of resources allocated to a process is a. Process control b. ALU c. Register Unit d. Process description
Last Answer : d. Process description
Description : A set of register which contain are: a. data b. memory addresses c. result d. all of these
Last Answer : d. all of these
Description : Virtual Mode Flag bit can be set using ____ instruction or any task switch operation only in the _____ mode a) IRET, Virtual b) POPF, Real c) IRET, protected d) POPF, protected
Last Answer : b) POPF, Real
Description : In modes 2 and 3, if _____ bit of SCON bit is set will causes enable multiprocessor communication and is of ____ bit address. a) SM1, 9EH b) TB8 , 9CH c) SM2 , 9DH d) SM0, 9FH
Last Answer : c) SM2 , 9DH
Description : Which of the following instruction is used to set bit port directly? a) SET P1.0 b) MOV P1.0, bit c) SETB P1.0 d) JB P1.0, bit
Last Answer : JB P1.0, bit
Description : Which of the following is of type memory initialized Directive? i) DS ii) SET iii) DW iv) DBIT a) i, iii b) ii c) iii d) iv, ii
Last Answer : b) ii
Description : In 8086 the overflow flag is set when a) The sum is more than 16 bits b) Signed numbers go out of their range after an arithmetic operation c) Carry and sign flags are set
Last Answer : b) Signed numbers go out of their range after an arithmetic operation
Description : If you see your college aged kid making some really dumb choices, how long before you interrupt and try to set him straight?
Last Answer : You think his friends are bad people because they’re not in school? Seriously? Is that the issue..?
Description : In accordance with Coast Guard Regulations (46 CFR), a circuit breaker located in the machinery space and installed in a 440V AC system must _____________. A. be dependent upon mechanical ... the maximum asymmetrical shortcircuit current available at the point of application D. all of the above
Last Answer : Answer: C
Description : You are designing a network which needs to support 200 users. You don't plan to extend the segment beyond the current number of users. Which subnet mask would best meet your needs? Select the best answer. A. 255.255.0.0 B. 255.255.255.0 C. 255.0.0.0 D. 255.224.0.0 E. 255.255.255.200
Last Answer : 255.255.255.0